公开(公告)号：US20160099201A1

公开(公告)日：2016-04-07

申请号：US14873453

申请日：2015-10-02

申请人： Ju-il Choi ,  Atsushi Fujisaki ,  Byung-lyul Park ,  Ji-soon Park ,  Joo-hee Jang ,  Jeong-gi Jin

发明人： Ju-il Choi ,  Atsushi Fujisaki ,  Byung-lyul Park ,  Ji-soon Park ,  Joo-hee Jang ,  Jeong-gi Jin

IPC分类号： H01L23/498 ,  H01L23/532 ,  H01L23/48

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L23/3135 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L24/00 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05557 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/11825 ,  H01L2224/11906 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13552 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01015 ,  H01L2924/014 ,  H01L2924/01074

摘要： An integrated circuit device includes a semiconductor structure, a through-silicon-via (TSV) structure that penetrates through the semiconductor structure and a connection terminal connected to the TSV structure. A metal capping layer includes a flat capping portion that covers the bottom surface of the connection terminal and a wedge-shaped capping portion that is integrally connected to the flat capping portion and that partially covers a side wall of the connection terminal. The metal capping layer may be formed by an electroplating process in which the connection terminal is in contact with a metal strike electroplating solution while a pulse-type current is applied.

摘要翻译： 集成电路器件包括半导体结构，穿透半导体结构的穿透硅通孔（TSV）结构和连接到TSV结构的连接端子。 金属覆盖层包括覆盖连接端子的底表面的平坦封盖部分和与扁平封盖部分整体连接并部分覆盖连接端子的侧壁的楔形封盖部分。 金属覆盖层可以通过电镀工艺形成，其中连接端子与金属冲击电镀溶液接触，同时施加脉冲型电流。

公开(公告)号：US09082680B2

公开(公告)日：2015-07-14

申请号：US13535766

申请日：2012-06-28

申请人： Ju-Il Choi ,  Jeong-Gi Jin ,  Ui-Hyoung Lee ,  Hyung-Seok Kim ,  Jeong-Woo Park

发明人： Ju-Il Choi ,  Jeong-Gi Jin ,  Ui-Hyoung Lee ,  Hyung-Seok Kim ,  Jeong-Woo Park

IPC分类号： H05K1/16 ,  H05K1/18 ,  H01L23/00 ,  H05K3/34 ,  B23K1/00 ,  H01L25/065 ,  H01L25/10 ,  H05K3/40 ,  H01L23/31

CPC分类号： H01L24/16 ,  B23K1/0016 ,  B23K2101/42 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13647 ,  H01L2224/13686 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01029 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/351 ,  H05K1/181 ,  H05K3/3442 ,  H05K3/3489 ,  H05K3/4007 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/053 ,  H01L2924/00012

摘要： The inventive concept provides methods for inhibiting the formation of one or more oxides on metal bumps during the formation of solder joint structures and solder joint structures including one or more preservative films. In some embodiments, the solder joint structure includes a metal bump having a preservative film disposed on the surface thereof.

摘要翻译： 本发明构思提供了在形成包括一个或多个防腐膜的焊接结构和焊点结构期间，抑制在金属凸块上形成一种或多种氧化物的方法。 在一些实施例中，焊点结构包括具有设置在其表面上的防腐膜的金属凸块。

公开(公告)号：US20130000978A1

公开(公告)日：2013-01-03

申请号：US13535766

申请日：2012-06-28

申请人： Ju-Il Choi ,  Jeong-Gi Jin ,  Ui-Hyoung Lee ,  Hyung-Seok Kim ,  Jeong-Woo Park

发明人： Ju-Il Choi ,  Jeong-Gi Jin ,  Ui-Hyoung Lee ,  Hyung-Seok Kim ,  Jeong-Woo Park

IPC分类号： H01R4/02

CPC分类号： H01L24/16 ,  B23K1/0016 ,  B23K2101/42 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13647 ,  H01L2224/13686 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01029 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/351 ,  H05K1/181 ,  H05K3/3442 ,  H05K3/3489 ,  H05K3/4007 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/053 ,  H01L2924/00012

摘要： The inventive concept provides methods for inhibiting the formation of one or more oxides on metal bumps during the formation of solder joint structures and solder joint structures including one or more preservative films. In some embodiments, the solder joint structure includes a metal bump having a preservative film disposed on the surface thereof.

摘要翻译： 本发明构思提供了在形成包括一个或多个防腐膜的焊接结构和焊点结构期间，抑制在金属凸块上形成一种或多种氧化物的方法。 在一些实施例中，焊点结构包括具有设置在其表面上的防腐膜的金属凸块。

公开(公告)号：US07843072B1

公开(公告)日：2010-11-30

申请号：US12190039

申请日：2008-08-12

申请人： Sung Su Park ,  Jin Young Kim ,  Jeong Gi Jin

发明人： Sung Su Park ,  Jin Young Kim ,  Jeong Gi Jin

IPC分类号： H01L23/48

CPC分类号： H01L24/06 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/3107 ,  H01L23/481 ,  H01L24/05 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/06135 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/00

摘要： Disclosed is a semiconductor package. The semiconductor package is configured to form a plurality of through holes for forming a through silicon via at once using a sawing device used for wafer sawing instead of a separate laser drilling equipment or a deep reactive ion etching (DRIE) equipment. Accordingly, the semiconductor package saves fabricating time and increases fabrication yield, saves costs for a laser drilling equipment or a DRIE equipment, and prevents various defects generated in an inner portion of a through hole in the case of using the laser drilling equipment or the DRIE equipment.

摘要翻译： 公开了一种半导体封装。 半导体封装被配置为形成多个通孔，用于通过使用用于晶片锯切的锯切装置代替单独的激光钻孔设备或深反应离子蚀刻（DRIE）设备来一次形成通硅。 因此，半导体封装节省制造时间并提高制造成品率，节省了激光钻孔设备或DRIE设备的成本，并且防止在使用激光钻孔设备或DRIE的情况下通孔内部产生的各种缺陷 设备。

公开(公告)号：US20140312491A1

公开(公告)日：2014-10-23

申请号：US14168317

申请日：2014-01-30

申请人： JEONG-GI JIN ,  HO-JOON LEE ,  JI-WOONG SUE ,  JOO-HEE JANG

发明人： JEONG-GI JIN ,  HO-JOON LEE ,  JI-WOONG SUE ,  JOO-HEE JANG

IPC分类号： H01L23/48 ,  H01L23/498

CPC分类号： H01L23/481 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/522 ,  H01L23/5225 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/0346 ,  H01L2224/0362 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05552 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06051 ,  H01L2224/06136 ,  H01L2224/06181 ,  H01L2224/06517 ,  H01L2224/06519 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/17519 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/014

摘要： Provided are a semiconductor device, a semiconductor package, and an electronic system. The device includes a substrate having a front side and a back side disposed opposite the front side. An internal circuit is disposed on or near to the front side of the substrate. Signal I/O through-via structures are disposed in the substrate. Back side conductive patterns are disposed on the back side of the substrate and electrically connected to the signal I/O through-via structures. A back side conductive structure is disposed on the back side of the substrate and spaced apart from the signal I/O through-via structures. The back side conductive structure includes parallel supporter portions.

摘要翻译： 提供半导体器件，半导体封装和电子系统。 该装置包括具有与前侧相对设置的前侧和后侧的基板。 内部电路设置在基板的正面上或附近。 信号I / O通孔结构设置在基板中。 背面导电图案设置在基板的背面并电连接到信号I / O通孔结构。 背面导电结构设置在基板的背面并与信号I / O通孔结构隔开。 背面导电结构包括平行支撑部分。

公开(公告)号：US09735090B2

公开(公告)日：2017-08-15

申请号：US14873453

申请日：2015-10-02

申请人： Ju-il Choi ,  Atsushi Fujisaki ,  Byung-Iyul Park ,  Ji-soon Park ,  Joo-hee Jang ,  Jeong-gi Jin

发明人： Ju-il Choi ,  Atsushi Fujisaki ,  Byung-Iyul Park ,  Ji-soon Park ,  Joo-hee Jang ,  Jeong-gi Jin

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L23/3135 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L24/00 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05557 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/11825 ,  H01L2224/11906 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13552 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01015 ,  H01L2924/014 ,  H01L2924/01074

摘要： An integrated circuit device includes a semiconductor structure, a through-silicon-via (TSV) structure that penetrates through the semiconductor structure and a connection terminal connected to the TSV structure. A metal capping layer includes a flat capping portion that covers the bottom surface of the connection terminal and a wedge-shaped capping portion that is integrally connected to the flat capping portion and that partially covers a side wall of the connection terminal. The metal capping layer may be formed by an electroplating process in which the connection terminal is in contact with a metal strike electroplating solution while a pulse-type current is applied.

公开(公告)号：US20150102497A1

公开(公告)日：2015-04-16

申请号：US14506930

申请日：2014-10-06

申请人： Jae-Hwa Park ,  Kwang-jin Moon ,  Suk-Chul Bang ,  Byung-Iyul Park ,  Jeong-gi Jin ,  Tae-seong Kim ,  Sung-hee Kang

发明人： Jae-Hwa Park ,  Kwang-jin Moon ,  Suk-Chul Bang ,  Byung-Iyul Park ,  Jeong-gi Jin ,  Tae-seong Kim ,  Sung-hee Kang

IPC分类号： H01L23/48 ,  H01L23/50 ,  H01L21/768 ,  H01L23/485

CPC分类号： H01L23/481 ,  H01L21/6835 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/485 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/18 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05096 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/13091 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/14511 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/00

摘要： Integrated circuit (IC) devices are provided including: a first multi-layer wiring structure including a plurality of first wiring layers in a first region of a substrate at different levels and spaced apart from one another, and a plurality of first contact plugs between the plurality of first wiring layers and connected to the plurality of first wiring layers; a through-silicon via (TSV) landing pad including a first pad layer in a second region of the substrate at a same level as that of at least one first wiring layer from among the plurality of first wiring layers, and a second pad layer at a same level as that of at least one first contact plug from among the plurality of first contact plugs and contacts the first pad layer; a second multi-layer wiring structure on the TSV landing pad; and a TSV structure that passes through the substrate and is connected to the second multi-layer wiring structure through the TSV landing pad.

摘要翻译： 提供集成电路（IC）装置，包括：第一多层布线结构，其包括在不同层级并彼此间隔开的基板的第一区域中的多个第一布线层，以及多个第一接触塞 多个第一布线层并连接到多个第一布线层; 贯穿硅通孔（TSV）着陆焊盘，其包括在与所述多个第一布线层中的至少一个第一布线层相同水平的所述基板的第二区域中的第一焊盘层;以及第二焊盘层， 与所述多个第一接触插塞中的至少一个第一接触插塞的水平相同，并接触所述第一衬垫层; TSV着陆板上的第二层多层布线结构; 以及TSV结构，其通过所述基板，并且通过所述TSV着陆焊盘与所述第二多层布线结构连接。

公开(公告)号：US09214411B2

公开(公告)日：2015-12-15

申请号：US14506930

申请日：2014-10-06

申请人： Jae-Hwa Park ,  Kwang-jin Moon ,  Suk-Chul Bang ,  Byung-Iyul Park ,  Jeong-gi Jin ,  Tae-seong Kim ,  Sung-hee Kang

发明人： Jae-Hwa Park ,  Kwang-jin Moon ,  Suk-Chul Bang ,  Byung-Iyul Park ,  Jeong-gi Jin ,  Tae-seong Kim ,  Sung-hee Kang

IPC分类号： H01L29/40 ,  H01L23/48 ,  H01L23/485 ,  H01L23/50 ,  H01L21/768 ,  H01L23/498 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L23/481 ,  H01L21/6835 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/485 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/18 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05096 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/13091 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/14511 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/00

摘要： Integrated circuit (IC) devices are provided including: a first multi-layer wiring structure including a plurality of first wiring layers in a first region of a substrate at different levels and spaced apart from one another, and a plurality of first contact plugs between the plurality of first wiring layers and connected to the plurality of first wiring layers; a through-silicon via (TSV) landing pad including a first pad layer in a second region of the substrate at a same level as that of at least one first wiring layer from among the plurality of first wiring layers, and a second pad layer at a same level as that of at least one first contact plug from among the plurality of first contact plugs and contacts the first pad layer; a second multi-layer wiring structure on the TSV landing pad; and a TSV structure that passes through the substrate and is connected to the second multi-layer wiring structure through the TSV landing pad.

摘要翻译： 提供集成电路（IC）装置，包括：第一多层布线结构，其包括在不同层级并彼此间隔开的基板的第一区域中的多个第一布线层，以及多个第一接触塞 多个第一布线层并连接到多个第一布线层; 贯穿硅通孔（TSV）着陆焊盘，其包括在与所述多个第一布线层中的至少一个第一布线层相同水平的所述基板的第二区域中的第一焊盘层;以及第二焊盘层， 与所述多个第一接触插塞中的至少一个第一接触插塞的水平相同，并接触所述第一衬垫层; TSV着陆板上的第二层多层布线结构; 以及TSV结构，其通过所述基板，并且通过所述TSV着陆焊盘与所述第二多层布线结构连接。