Abstract:
A method for producing a composite material, associated composite material and associated semiconductor circuit arrangements is disclosed. A plurality of first electrically conducting material particles are applied to a carrier substrate and a second electrically conducting material is galvanically deposited on a surface of the first material particles in such a way that the second material mechanically and electrically bonds the plurality of first material particles to one another.
Abstract:
A source material, which is based on a glass, is arranged on a working surface of a mold substrate. The mold substrate is made of a single-crystalline material. A cavity is formed in the working surface. The source material is pressed against the mold substrate. During pressing a temperature of the source material and a force exerted on the source material are controlled to fluidify source material. The fluidified source material flows into the cavity. Re-solidified source material forms a glass piece with a protrusion extending into the cavity. After re-solidifying, the glass piece may be bonded to the mold substrate. On the glass piece, protrusions and cavities can be formed with slope angles less than 80 degrees, with different slope angles, with different depths and widths of 10 micrometers and more.
Abstract:
A cavity is formed in a working surface of a substrate in which a semiconductor element is formed. A glass piece formed from a glass material is bonded to the substrate, and the cavity is filled with the glass material. For example, a pre-patterned glass piece is used which includes a protrusion fitting into the cavity. Cavities with widths of more than 10 micrometers are filled fast and reliably. The cavities may have inclined sidewalls.
Abstract:
In one embodiment, a semiconductor package includes an isolating container having a recess, which forms an inner membrane portion and an outer rim portion. The rim portion is thicker than the membrane portion. The package includes a semiconductor chip disposed in the recess and a backplane disposed under the membrane portion of the isolating container.
Abstract:
A semiconductor device and method for producing such a device is disclosed. One embodiment provides a semiconductor functional wafer having a first and second main surface. Component production processes are performed for producing a component functional region at the first main surface, wherein the component production processes produce an end state that is stable up to at least a first temperature. A carrier substrate is fitted to the first main surface. Access openings are produced to the first main surface. At least one further component production process is performed for producing patterned component functional regions at the first main surface of the functional wafer in the access openings. The end state produced in this process is stable up to a second temperature, which is less than the first temperature.
Abstract:
A semiconductor device and manufacturing method. One embodiment provides at least two semiconductor chips. A dielectric material is applied to the at least two semiconductor chips to attach the at least two semiconductor chips to each other. A portion of the dielectric material is selectively removed between the at least two semiconductor chips to form at least one recess in the dielectric material. Metal particles including paste is applied to the at least one recess in the dielectric material.
Abstract:
A semiconductor structure includes: a carrier plate; a thermosensitive adhesive coupled to a top surface of the carrier plate, which is removable from the carrier plate at a predetermined, defined temperature at which the thermosensitive adhesive loses its adhesive action; semiconductor chips having active top surfaces and back surfaces, where the active top surfaces include contact surfaces disposed on the thermosensitive adhesive; and a plastic embedding compound on the carrier plate, in which the semiconductor chips are embedded.
Abstract:
A chip package is provided, the chip package including: first encapsulation structure; first passivation layer formed over first encapsulation structure and first electrically conductive layer formed over first passivation layer; at least one chip arranged over first electrically conductive layer and passivation layer wherein at least one chip contact pad contacts first electrically conductive layer; at least one cavity formed in first encapsulation structure, wherein at least one cavity exposes a portion of first passivation layer covering at least one chip contact pad; second encapsulation structure disposed over first encapsulation structure and covering at least one cavity, wherein a chamber region over at least one chip contact pad is defined by at least one cavity and second encapsulation structure; wherein second encapsulation structure includes an inlet and outlet connected to chamber region, wherein inlet and outlet control an inflow and outflow of heat dissipating material to and from chamber region.
Abstract:
A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallisation region is formed on the machined second surface of the semiconductor wafer.
Abstract:
A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallisation region is formed on the machined second surface of the semiconductor wafer.