公开(公告)号：US20240341026A1

公开(公告)日：2024-10-10

申请号：US18296461

申请日：2023-04-06

申请人： WOLFSPEED, INC.

发明人： Haedong JANG ,  Marvin MARBELL ,  Jeremy FISHER

IPC分类号： H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC分类号： H05K1/0201 ,  H05K1/116 ,  H05K1/181 ,  H01L25/162 ,  H05K2201/0326 ,  H05K2201/066 ,  H05K2201/10015

摘要： A component includes a substrate board; a thermal bridge structured and arranged on the substrate board, where the thermal bridge is configured to transfer heat from the substrate board including an area adjacent to or on a hotspot of the substrate board; where the thermal bridge is configured to transfer the heat to another location on the substrate board for removal of the heat from the substrate board; and where the thermal bridge may include silicon carbide.

公开(公告)号：US12094876B2

公开(公告)日：2024-09-17

申请号：US16863797

申请日：2020-04-30

申请人： Wolfspeed, Inc.

发明人： Daniel Jenner Lichtenwalner ,  Woongsun Kim

IPC分类号： H01L27/088 ,  H01L23/528 ,  H01L23/532 ,  H01L29/10 ,  H01L29/16 ,  H01L29/36 ,  H01L29/78

CPC分类号： H01L27/088 ,  H01L23/528 ,  H01L23/53257 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/7813

摘要： Power switching devices include a semiconductor layer structure, a plurality of unit cell transistors that are electrically connected in parallel, each unit cell transistor including a gate finger that has a longitudinal axis that extends in a first direction on the semiconductor layer structure, the gate fingers spaced apart from each other along a second direction, and a gate connector having a longitudinal axis that extends in the second direction, the gate connector connected to the gate fingers of the plurality of unit cell transistors.

公开(公告)号：US20240304702A1

公开(公告)日：2024-09-12

申请号：US18179070

申请日：2023-03-06

申请人： Wolfspeed, Inc.

发明人： Kyle Bothe ,  Chris Hardiman ,  Scott Sheppard

IPC分类号： H01L29/66 ,  H01L29/20 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/778

CPC分类号： H01L29/66462 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41725 ,  H01L29/4232 ,  H01L29/7786

摘要： Field reducing structures for transistor devices having Group III-nitride semiconductor structures are provided. In one example, a transistor device includes a nitrogen-polar (N-polar) Group III-nitride semiconductor structure. The transistor device includes a source contact, a drain contact, and a gate contact. The transistor device includes a field reducing structure operable to reduce an electric field in a region in the N-polar Group III-nitride semiconductor structure between the gate contact and the drain contact.

公开(公告)号：US20240274584A1

公开(公告)日：2024-08-15

申请号：US18429629

申请日：2024-02-01

申请人： Wolfspeed, Inc.

发明人： Brice McPherson ,  Shashwat Singh ,  Roberto M. Schupbach

IPC分类号： H01L25/07 ,  H01L23/00 ,  H01L23/34 ,  H01L23/498 ,  H02M7/00 ,  H02M7/5387

CPC分类号： H01L25/072 ,  H01L23/49811 ,  H02M7/003 ,  H01L23/34 ,  H01L23/49861 ,  H01L24/48 ,  H01L2224/48105 ,  H01L2224/48175 ,  H01L2924/10272 ,  H01L2924/13091 ,  H02M7/5387

摘要： A power module is provided with a substrate, power devices, and a housing. The power devices are mounted on device pads of the substrate and arranged to provide a power circuit having a first input, a second input, and at least one output. First and second power terminals provide first and second inputs for the power circuit. At least one output power terminal provides at least one output. The housing encompasses the substrate, the power devices, and portions of the first and second input power terminals as well as the at least one output power terminal. The first and second input power terminals extend out of a first side of the housing, and the at least one output power terminal extends out of a second side of the housing, the first side being opposite the second side.

公开(公告)号：US20240266426A1

公开(公告)日：2024-08-08

申请号：US18164249

申请日：2023-02-03

申请人： Wolfspeed, Inc.

发明人： Matthew R. King ,  Christer Hallin ,  Scott Sheppard

IPC分类号： H01L29/778 ,  H01L29/20 ,  H01L29/201

CPC分类号： H01L29/7786 ,  H01L29/2003 ,  H01L29/201

摘要： Semiconductor devices are provided. In one example, a semiconductor device may include a substrate. The semiconductor device may include an aluminum nitride layer on the substrate. The aluminum nitride layer having a thickness of about 200 nm or greater, such as about 400 nm or greater, such as in a range of 500 nm to 1000 nm. The semiconductor device may include a Group III-nitride semiconductor structure on the aluminum nitride layer.

公开(公告)号：US20240266348A1

公开(公告)日：2024-08-08

申请号：US18105586

申请日：2023-02-03

申请人： Wolfspeed, Inc.

发明人： Fabian Radulescu ,  Basim Noori ,  Scott Sheppard ,  Qianli Mu ,  Jeremy Fisher ,  Dan Namishia

IPC分类号： H01L27/085 ,  H01L23/00 ,  H01L23/528

CPC分类号： H01L27/085 ,  H01L23/528 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0603 ,  H01L2224/0615 ,  H01L2224/13014 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/1415 ,  H01L2224/16227

摘要： A transistor device includes a substrate and a plurality of transistor unit cells arranged in parallel on the substrate. Each of the transistor unit cells includes a source contact, a drain contact, and a gate finger between the source contact and the drain contact. The gate finger extends in a first direction and has a first end and a second end. The transistor device further includes a first solder bump on the transistor device that is within a periphery of the active region of the device and is electrically connected to the gate finger of a first one of the unit cells at a feed point that is between the first end and the second end of the gate finger.

公开(公告)号：US12057389B2

公开(公告)日：2024-08-06

申请号：US17501244

申请日：2021-10-14

申请人： Wolfspeed, Inc.

发明人： Daniel Jenner Lichtenwalner ,  Edward Robert Van Brunt

IPC分类号： H01L23/522 ,  H01L23/532 ,  H01L29/06 ,  H01L29/16 ,  H01L29/732 ,  H01L29/739 ,  H01L29/78

CPC分类号： H01L23/5226 ,  H01L23/5329 ,  H01L29/0607 ,  H01L29/1608 ,  H01L29/732 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/7816

摘要： A transistor semiconductor die includes a drift layer, a first dielectric layer, a first metallization layer, a second dielectric layer, a second metallization layer, a first plurality of electrodes, and a second plurality of electrodes. The first dielectric layer is over the drift layer. The first metallization layer is over the first dielectric layer such that at least a portion of the first metallization layer provides a first contact pad. The second dielectric layer is over the first metallization layer. The second metallization layer is over the second dielectric layer such that at least a portion of the second metallization layer provides a second contact pad and the second metallization layer at least partially overlaps the first metallization layer. The transistor semiconductor die is configured to selectively conduct current between the first contact pad and a third contact pad based on signals provided at the second contact pad.

公开(公告)号：US20240258217A1

公开(公告)日：2024-08-01

申请号：US18161144

申请日：2023-01-30

申请人： Wolfspeed, Inc.

发明人： Afshin Dadvand ,  Devarajan Balaraman

IPC分类号： H01L23/495 ,  H01L21/48 ,  H01L23/00

CPC分类号： H01L23/49582 ,  H01L21/4821 ,  H01L23/49513 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L23/293 ,  H01L23/296 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05573 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48175 ,  H01L2224/73265 ,  H01L2924/10272

摘要： A semiconductor device package includes a conductive submount, a metal layer comprising a first material on the conductive submount, and at least one conductive buffer layer comprising a second material on the metal layer. The conductive buffer layer may be between the metal layer and the conductive submount, or may be between the metal layer and a transistor die on the conductive submount. The second material of the conductive buffer layer has limited or no solid solubility with respect to the first material of the metal layer. Related packages and fabrication techniques are also discussed.

公开(公告)号：US12051669B2

公开(公告)日：2024-07-30

申请号：US17494909

申请日：2021-10-06

申请人： Wolfspeed, Inc.

发明人： Alexander Komposch ,  Kevin Schneider ,  Scott Sheppard

IPC分类号： H01L23/00 ,  H01L21/768 ,  H01L23/48

CPC分类号： H01L24/29 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L24/27 ,  H01L2224/02372 ,  H01L2224/02381 ,  H01L2224/05569 ,  H01L2224/2745 ,  H01L2224/29025 ,  H01L2224/29084 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29184 ,  H01L2924/10272 ,  H01L2924/13064 ,  H01L2924/13091

摘要： A semiconductor device package includes a package substrate having a die attach region, a silicon carbide (SiC) substrate having a first surface including a semiconductor device layer thereon and a second surface that is opposite the first surface, and a die attach metal stack. The die attach metal stack includes a sputtered die attach material layer that attaches the second surface of the SiC substrate to the die attach region of the package substrate, where the sputtered die attach material layer comprises a void percent of about 15% or less. The sputtered die attach material layer may be formed using a sputter gas including at least one of krypton (Kr), xenon (Xe), or radon (Rn). The die attach metal stack may further include a metal interlayer that prevent contacts with a first barrier metal layer during a phase transition of the die attach material layer.

公开(公告)号：USD1036395S1

公开(公告)日：2024-07-23

申请号：US29855192

申请日：2022-09-30

申请人： WOLFSPEED, INC.

设计人： Brice McPherson ,  Alexander Lostetter

摘要： FIG. 1 is a right front side perspective view of the power module;
FIG. 2 is a top side view of the power module shown in FIG. 1;
FIG. 3 is a bottom side view of the power module shown in FIG. 1;
FIG. 4 is a right side view of the power module shown in FIG. 1;
FIG. 5 is a left side view of the power module shown in FIG. 1;
FIG. 6 is a front side view of the power module shown in FIG. 1; and,
FIG. 7 is a back side view of the power module shown in FIG. 1.
In the drawings, the claimed design is defined by the shaded surfaces; broken lines immediately adjacent shaded surfaces represent boundaries of the claim and form no part thereof; all other broken lines depict unclaimed environmental subject matter and form no part of the claim.