公开(公告)号：US20190237436A1

公开(公告)日：2019-08-01

申请号：US16378260

申请日：2019-04-08

申请人： Micron Technology, Inc.

发明人： David J. Corisis ,  Matt Schwab

IPC分类号： H01L25/065 ,  H01L25/18

CPC分类号： H01L25/0657 ,  H01L25/18 ,  H01L2224/48145 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00012

摘要： There is provided a semiconductor device assembly with an interposer and method of manufacturing the same. More specifically, in one embodiment, there is provided a semiconductor device assembly comprising a semiconductor substrate, at least one semiconductor die attached to the semiconductor substrate, an interposer disposed on the semiconductor die, and a controller attached to the interposer. There is also provided a method of manufacturing comprising forming a first subassembly by coupling a substrate and a semiconductor die, and forming second subassembly by attaching a controller to an interposer, and coupling the first subassembly to the second subassembly.

公开(公告)号：US20190214369A1

公开(公告)日：2019-07-11

申请号：US16325970

申请日：2016-09-28

申请人： Intel IP Corporation

发明人： Georg SEIDEMANN ,  Thomas WAGNER ,  Klaus REINGRUBER ,  Bernd WAIDHAS ,  Andreas WOLTER

IPC分类号： H01L25/065 ,  H01L23/498

CPC分类号： H01L25/0657 ,  H01L23/00 ,  H01L23/31 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/24 ,  H01L24/48 ,  H01L24/73 ,  H01L29/0657 ,  H01L2224/05 ,  H01L2224/13025 ,  H01L2224/16227 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48148 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2224/81 ,  H01L2924/00

摘要： In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing reduced height semiconductor packages for mobile electronics. For instance, there is disclosed in accordance with one embodiment a stacked die package having therein a bottom functional silicon die; a recess formed within the bottom functional silicon die by a thinning etch partially reducing a vertical height of the bottom functional silicon die at the recess; and a top component positioned at least partially within the recess formed within the bottom functional silicon die. Other related embodiments are disclosed.

公开(公告)号：US20190214368A1

公开(公告)日：2019-07-11

申请号：US16041174

申请日：2018-07-20

申请人： LITE-ON SINGAPORE PTE. LTD.

发明人： YOU-FA WANG ,  WEI-WEN LAI ,  PU-HAN LIN

IPC分类号： H01L25/065 ,  H01L23/495 ,  H01L25/00 ,  H01L23/31 ,  H01L23/66 ,  H01L25/16 ,  H01F38/14 ,  H01L21/56

CPC分类号： H01L25/0657 ,  H01F38/14 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/495 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/66 ,  H01L24/48 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6661 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48245 ,  H01L2225/0651 ,  H01L2225/06531 ,  H01L2225/06572 ,  H01L2924/19042

摘要： The instant disclosure includes a magnetic coupling package structure with duo leadframes for a magnetically coupled isolator and a method for manufacturing the same. The method includes a leadframe providing step, a chip connecting step and a coil alignment step. The leadframe providing step includes providing a first and a second leadframe each including a chip carrying portion, a coil portion, a plurality of pins and floating pins. The chip connecting step includes disposing at least a first chip and at least a second chip onto the corresponding chip carrying portions for electrically connecting the chips to the pins. The coil alignment step includes arranging the first leadframe above or beneath the second leadframe and applying a first and a second magnetic field to the first and the second leadframes respectively for aligning the coil portions, thereby controlling the coupling effect between two coil portions.

公开(公告)号：US20190189592A1

公开(公告)日：2019-06-20

申请号：US16105202

申请日：2018-08-20

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Young-Hoon SON ,  Jung-Hwan CHOI ,  Seok-Hun HYUN

IPC分类号： H01L25/065 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L24/02 ,  H01L2224/02379 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/1434

摘要： A semiconductor package includes a first layer including a first semiconductor chip and a first through via, a first redistribution layer disposed on a surface of the first layer, and including a first-first wiring and a second-first wiring, and a second layer including a second semiconductor chip, and stacked on the first layer. The first semiconductor chip includes a first-first buffer, and the first-first buffer is electrically connected between the first-first wiring and the second-first wiring.

公开(公告)号：US20190172815A1

公开(公告)日：2019-06-06

申请号：US15832336

申请日：2017-12-05

申请人： Infineon Technologies AG

发明人： Hui Teng Wang ,  Swain Hong Yeo

IPC分类号： H01L25/065 ,  H01L23/495 ,  H01L23/31 ,  H01L23/367 ,  H01L25/00 ,  H01L21/78 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L21/4825 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/49503 ,  H01L23/49537 ,  H01L23/49555 ,  H01L23/49568 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. A spacer separates the leadframe assemblies from one another. A single mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the spacer. A portion of the leads of both leadframe assemblies are uncovered by the mold compound to form terminals of the semiconductor package. A side of both die pads is uncovered by the mold compound.

公开(公告)号：US20190148314A1

公开(公告)日：2019-05-16

申请号：US16138003

申请日：2018-09-21

申请人： Micron Technology, Inc.

发明人： James E. Davis ,  Kevin G. Duesman ,  Jeffrey P. Wright ,  Warren L. Boyer

IPC分类号： H01L23/60 ,  H01L23/538 ,  H01L23/00 ,  H01L25/04

CPC分类号： H01L23/60 ,  G11C5/02 ,  G11C5/025 ,  H01L23/538 ,  H01L24/02 ,  H01L24/10 ,  H01L24/95 ,  H01L25/043 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements, and a plated pad electrically coupling at least a part of the first contact pad to at least a part of the second contact pad. The substrate includes a substrate contact electrically coupled to the plated pad on the die.

公开(公告)号：US20190148255A1

公开(公告)日：2019-05-16

申请号：US15884397

申请日：2018-01-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Hao Tseng ,  Hung-Jui Kuo ,  Ming-Che Ho ,  Chia-Hung Liu

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L23/3128 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/14 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/81 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/214 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92125 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/19011 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/013 ,  H01L2224/83

摘要： A semiconductor package includes an encapsulated semiconductor device, a redistribution structure, and a protection layer. The encapsulated semiconductor device includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. The redistribution structure is disposed on the encapsulated semiconductor device and includes a dielectric layer and a redistribution circuit layer electrically connected to the semiconductor device. The protection layer at least covers the dielectric layer, wherein an oxygen permeability or a water vapor permeability of the protection layer is substantially lower than an oxygen permeability or a vapor permeability of the dielectric layer.

公开(公告)号：US20190080774A1

公开(公告)日：2019-03-14

申请号：US15953992

申请日：2018-04-16

申请人： Samsung Electronics Co., Ltd.

发明人： Chulseung Lee ,  Soon Suk Hwang ,  ChoongEui Lee

IPC分类号： G11C16/32 ,  G11C16/26 ,  G11C16/10

CPC分类号： G11C16/32 ,  G06F13/1689 ,  G06F13/4239 ,  G11C5/04 ,  G11C7/1066 ,  G11C7/1093 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  G11C2207/2254 ,  H01L25/0657 ,  H01L2225/0651

摘要： A storage device includes a plurality of nonvolatile memory devices each exchanging data by using a data strobe signal and a data signal, and a storage controller categorizing the plurality of nonvolatile memory devices into a plurality of groups and performing training in units of the plurality of groups. The storage controller performs data training on a first nonvolatile memory device selected in a first group of the plurality of groups and sets a delay of a data signal of a second nonvolatile memory device included in the first group by using a result value of the data training for the first nonvolatile memory device.

公开(公告)号：US20180366457A1

公开(公告)日：2018-12-20

申请号：US15781798

申请日：2015-12-16

申请人： Intel Corporation

发明人： Eng Huat Goh ,  Hoay Tien Teoh

IPC分类号： H01L25/18 ,  H01L25/00 ,  H01L23/00 ,  H01L23/367 ,  H01L23/538 ,  H01L21/48

CPC分类号： H01L25/18 ,  H01L21/4882 ,  H01L23/13 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/48 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099

摘要： Donut-shaped Dynamic Random Access Memory (DRAM) includes a hole that fits around a processor, such that the DRAM and the processor are adjacent to one another on an Integrated Circuit (TC) package. In an embodiment, a heat spreader is mounted on top of the processor and covers a top of the DRAM without touching the DRAM.

公开(公告)号：US20180366409A1

公开(公告)日：2018-12-20

申请号：US15954213

申请日：2018-04-16

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Shinichi KUWABARA ,  Tetsuya IIDA ,  Yasutaka NAKASHIBA

IPC分类号： H01L23/522 ,  H01L25/065 ,  H01L23/31 ,  H01L23/528 ,  H01L23/64 ,  H01L23/552 ,  H01L21/8238 ,  H01L25/00

CPC分类号： H01L23/5227 ,  H01L21/26513 ,  H01L21/823871 ,  H01L21/823878 ,  H01L21/823892 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49575 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/552 ,  H01L23/645 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2225/0651 ,  H01L2225/06531 ,  H01L2225/06534 ,  H01L2225/06562 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A compact semiconductor device with an isolator. The semiconductor device includes two chips, namely a first semiconductor chip and a second semiconductor chip which are stacked with the main surfaces of the semiconductor chips partially facing each other. A first coil and a second coil which are formed in the first semiconductor chip and the second semiconductor chip respectively are arranged to face each other so as to be magnetically coupled during operation of the semiconductor device. The pair of first and second coils make up an isolator. The first coil is arranged in a manner to overlap part of the circuit region of the first semiconductor chip in plan view and the second coil is arranged in a manner to overlap part of the circuit region of the second semiconductor chip in plan view.