公开(公告)号：US11764118B2

公开(公告)日：2023-09-19

申请号：US17244686

申请日：2021-04-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wen-Yi Lin ,  Kuang-Chun Lee ,  Chien-Chen Li ,  Chen-Shien Chen

IPC: H01L23/10 ,  H01L21/48 ,  H01L23/053 ,  H01L23/367 ,  H01L23/552 ,  H01L23/00

CPC classification number: H01L23/10 ,  H01L21/4817 ,  H01L23/053 ,  H01L23/3675 ,  H01L23/552 ,  H01L23/562 ,  H01L24/06 ,  H01L2924/16195

Abstract: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate, and forming a first adhesive element over the substrate. The first adhesive element has a first electrical resistivity. The method also includes forming a second adhesive element over the substrate. The second adhesive element has a second electrical resistivity, and the second electrical resistivity is greater than the first electrical resistivity. The method further includes attaching a protective lid to the substrate through the first adhesive element and the second adhesive element. The protective lid surrounds the chip structure and covers a top surface of the chip structure.

公开(公告)号：US11749575B2

公开(公告)日：2023-09-05

申请号：US17462850

申请日：2021-08-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hui-Ting Lin ,  Chin-Fu Kao ,  Chen-Shien Chen

IPC: H01L23/31

CPC classification number: H01L23/31

Abstract: A package structure is provided. The package structure includes a substrate, a cover element, a semiconductor device, a protruding element, and an adhesive element. The cover element is disposed on the substrate and having a ring portion, a space is surrounded by the ring portion, and a recess is formed on a surface of the ring portion that faces the substrate. The semiconductor device is disposed on the substrate and disposed in the space surrounded by the ring portion, wherein the semiconductor device is spaced apart from the recess by the ring portion. The protruding element extends from the substrate and disposed in the recess. The adhesive element is disposed in the recess, wherein in a top view, the semiconductor device is surrounded by the protruding element.

公开(公告)号：US11728180B2

公开(公告)日：2023-08-15

申请号：US17717520

申请日：2022-04-11

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kuo-Ching Hsu ,  Yu-Huan Chen ,  Chen-Shien Chen

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L21/4853 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16227 ,  H01L2224/81035 ,  H01L2224/81047 ,  H01L2224/81192 ,  H01L2224/81395 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81493

Abstract: A chip package structure is provided. The chip package structure includes a wiring substrate including a substrate, a first pad, and a second pad. The first pad and the second pad are respectively over a first surface and a second surface of the substrate, and the first pad is narrower than the second pad. The chip package structure includes a conductive adhesive layer over the first pad. The conductive adhesive layer is in direct contact with the first pad. The chip package structure includes a nickel layer over the conductive adhesive layer. The chip package structure includes a chip over the wiring substrate. The chip package structure includes a conductive bump between the nickel layer and the chip. The conductive bump includes gold.

公开(公告)号：US20230253355A1

公开(公告)日：2023-08-10

申请号：US18300493

申请日：2023-04-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chih-Horng Chang ,  Tin-Hao Kuo ,  Chen-Shien Chen ,  Yen-Liang Lin

IPC: H01L23/00 ,  H01L25/00

CPC classification number: H01L24/13 ,  H01L24/14 ,  H01L24/11 ,  H01L25/50 ,  H01L24/16 ,  H01L24/81 ,  H01L2924/2064 ,  H01L2924/384 ,  H01L2224/13012 ,  H01L2224/05552 ,  H01L2224/81345 ,  H01L2224/11849 ,  H01L2224/13018 ,  H01L2224/14152 ,  H01L2224/14153 ,  H01L2924/01322 ,  Y10T428/24479 ,  Y10T428/12493 ,  H01L2224/05572 ,  H01L2924/00014 ,  H01L2224/81815 ,  H01L2224/81191 ,  H01L2224/16238 ,  H01L2224/13147 ,  H01L2224/131 ,  H01L2224/13083 ,  H01L2224/13082 ,  H01L2224/05599 ,  H01L2224/0401 ,  H01L2224/13011 ,  H01L2224/13015 ,  H01L2224/14051 ,  H01L2224/10145 ,  H01L2224/1412

Abstract: The present disclosure relates to an integrated chip structure having a first substrate including a plurality of transistor devices disposed within a semiconductor material. An interposer substrate includes vias extending through a silicon layer. A copper bump is disposed between the first substrate and the interposer substrate. The copper bump has a sidewall defining a recess. Solder is disposed over the copper bump and continuously extending from over the copper bump to within the recess. A conductive layer is disposed between the first substrate and the interposer substrate and is separated from the copper bump by the solder.

公开(公告)号：US11621317B2

公开(公告)日：2023-04-04

申请号：US17402889

申请日：2021-08-16

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chi-Cheng Chen ,  Wei-Li Huang ,  Chun-Yi Wu ,  Kuang-Yi Wu ,  Hon-Lin Huang ,  Chih-Hung Su ,  Chin-Yu Ku ,  Chen-Shien Chen

IPC: H01L27/22 ,  H01L49/02 ,  H01F41/04 ,  H01L23/00 ,  H01L21/768 ,  H01L23/31 ,  H01L23/532

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an isolation layer covering the magnetic element and a portion of the semiconductor substrate. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding edges of the magnetic element.

公开(公告)号：US11437361B2

公开(公告)日：2022-09-06

申请号：US16569078

申请日：2019-09-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Jen Lai ,  Lin Chung-Yi ,  Hsi-Kuei Cheng ,  Chen-Shien Chen ,  Kuo-Chio Liu

IPC: H01L25/00 ,  H01L25/10 ,  H01L23/60 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L25/18 ,  H01L21/683 ,  H01L21/56

Abstract: A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.

公开(公告)号：US11342253B2

公开(公告)日：2022-05-24

申请号：US16684774

申请日：2019-11-15

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ching-Wen Hsiao ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Chen-Shien Chen ,  Chih-Hua Chen ,  Chen-Cheng Kuo

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/683 ,  H01L25/10 ,  H01L23/00

Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.

公开(公告)号：US11329008B2

公开(公告)日：2022-05-10

申请号：US17028862

申请日：2020-09-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Chen-Shien Chen ,  Ming-Da Cheng ,  Ming-Chih Yew ,  Yu-Tse Su

IPC: H01L23/00 ,  H01L23/52 ,  H01L27/02 ,  H01L23/538 ,  H01L23/498 ,  H01L21/683 ,  H01L23/31

Abstract: A method for manufacturing a semiconductor package includes following operations. A die having a first surface and a second surface opposite to the first surface is provided. A polymeric film is disposed over the second surface of the die. An adhesive film is provided. The die and the polymeric film are attached to a carrier substrate through the adhesive film. The die, the polymeric film and the adhesive film are molded with a molding compound. The polymeric film is sandwiched between the die and the adhesive film upon attaching to the carrier substrate.

公开(公告)号：US11018086B2

公开(公告)日：2021-05-25

申请号：US16215731

申请日：2018-12-11

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chih-Hua Chen ,  Chen-Shien Chen

IPC: H01L29/00 ,  H01L23/522 ,  H01L23/64 ,  H01L21/683 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H01L23/00 ,  H01L25/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L21/60

Abstract: A device includes a polymer. A device die is disposed in the polymer. A passive device includes three Through Assembly Vias (TAVs) penetrating through the polymer, wherein the TAVs are coupled in series. A Redistribution Line (RDL) is underlying the polymer. The RDL electrically couples a first one of the TAVs to a second one of the TAVs.

公开(公告)号：US10734347B2

公开(公告)日：2020-08-04

申请号：US16400504

申请日：2019-05-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Sheng-Yu Wu ,  Tin-Hao Kuo ,  Chita Chuang ,  Chen-Shien Chen

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/532 ,  H01L21/56 ,  H01L23/58 ,  H01L23/522 ,  H01L21/60

Abstract: A device includes a metal pad over a substrate. A passivation layer includes a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI comprises a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A dummy bump is over the polymer layer, wherein the dummy bump is electrically insulated from conductive features underlying the polymer layer.