公开(公告)号：US20220301964A1

公开(公告)日：2022-09-22

申请号：US17834938

申请日：2022-06-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Sheng-Huan Chiu ,  Chun-Jen Chen ,  Chen-Shien Chen ,  Kuo-Chio Liu ,  Kuo-Hui Chang ,  Chung-Yi Lin ,  Hsi-Kuei Cheng ,  Yi-Jen Lai

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00

Abstract: A package includes a die, first conductive structures, second conductive structures, an encapsulant, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The first conductive structures and the second conductive structures surround the die. A shape of the first conductive structures is different a shape of the second conductive structures. The second conductive structures include elliptical columns having straight sidewalls. A distance between the first conductive structure that is closest to the die and the die is greater than a distance between the second conductive structure that is closest to the die and the die. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures. The redistribution structure is over the die and the encapsulant. The redistribution structure is electrically connected to the die, the first conductive structures, and the second conductive structures.

公开(公告)号：US12051634B2

公开(公告)日：2024-07-30

申请号：US18356243

申请日：2023-07-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Sheng-Huan Chiu ,  Chun-Jen Chen ,  Chen-Shien Chen ,  Kuo-Chio Liu ,  Kuo-Hui Chang ,  Chung-Yi Lin ,  Hsi-Kuei Cheng ,  Yi-Jen Lai

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L25/07 ,  H01L25/075 ,  H01L25/11

CPC classification number: H01L23/3121 ,  H01L21/565 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/09 ,  H01L24/23 ,  H01L24/25 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/0756 ,  H01L25/117 ,  H01L2224/02379 ,  H01L2224/2105 ,  H01L2224/2205 ,  H01L2224/23 ,  H01L2224/2401 ,  H01L2224/2405 ,  H01L2224/2505 ,  H01L2225/1011 ,  H01L2225/1047 ,  H01L2225/1058 ,  H01L2924/1811

Abstract: A package includes a die, first conductive structures, second conductive structures, and an encapsulant. The die has a rear surface. The first conductive structures and the second conductive structures surround the die. The first conductive structures include cylindrical columns and the second conductive structures include elliptical columns. At least one of the second conductive structures is closer to the die than the first conductive structures. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures.

公开(公告)号：US20190267274A1

公开(公告)日：2019-08-29

申请号：US16410183

申请日：2019-05-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsi-Kuei Cheng ,  Ching Fu Chang ,  Chih-Kang Han ,  Hsin-Chieh Huang

IPC: H01L21/683 ,  H01L23/00 ,  H01L21/56 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/768 ,  H01L21/288 ,  H01L23/48 ,  H01L21/78 ,  H01L23/31

Abstract: A method includes forming a first polymer layer to cover a metal pad of a wafer, and patterning the first polymer layer to form a first opening. A first sidewall of the first polymer layer exposed to the first opening has a first tilt angle where the first sidewall is in contact with the metal pad. The method further includes forming a metal pillar in the first opening, sawing the wafer to generate a device die, encapsulating the device die in an encapsulating material, performing a planarization to reveal the metal pillar, forming a second polymer layer over the encapsulating material and the device die, and patterning the second polymer layer to form a second opening. The metal pillar is exposed through the second opening. A second sidewall of the second polymer layer exposed to the second opening has a second tilt angle greater than the first tilt angle.

公开(公告)号：US10128182B2

公开(公告)日：2018-11-13

申请号：US15410194

申请日：2017-01-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Hsi-Kuei Cheng ,  Chih-Kang Han ,  Ching-Fu Chang ,  Hsin-Chieh Huang

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor structure includes a substrate; a die disposed over the substrate, and including a die pad, a conductive via disposed over the die pad and a dielectric material surrounding the conductive via; a molding disposed over the substrate and surrounding the die; a lower dielectric layer disposed nearer the substrate and over the dielectric material and the molding; and an upper dielectric layer disposed further the substrate and over the lower dielectric layer, wherein a material content ratio in the upper dielectric layer is substantially greater than that in the lower dielectric layer, and the material content ratio substantially inversely affects a mechanical strength of the upper dielectric layer and the lower dielectric layer.

公开(公告)号：US20180082988A1

公开(公告)日：2018-03-22

申请号：US15366996

申请日：2016-12-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsi-Kuei Cheng ,  Ching Fu Chang ,  Chih-Kang Han ,  Hsin-Chieh Huang

IPC: H01L25/10 ,  H01L21/48 ,  H01L21/683 ,  H01L21/56 ,  H01L21/78 ,  H01L25/065 ,  H01L25/00 ,  H01L25/16

CPC classification number: H01L25/105 ,  H01L21/486 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68359 ,  H01L2224/48091 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: An embodiment is a structure including a first package including a first die, and a molding compound at least laterally encapsulating the first die, a second package bonded to the first package with a first set of conductive connectors, the second package comprising a second die, and an underfill between the first package and the second package and surrounding the first set of conductive connectors, the underfill having a first portion extending up along a sidewall of the second package, the first portion having a first sidewall, the first sidewall having a curved portion and a planar portion.

公开(公告)号：US09391067B2

公开(公告)日：2016-07-12

申请号：US14673388

申请日：2015-03-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Der-Chyang Yeh ,  Hsing-Kuo Hsia ,  Hao-Hsun Lin ,  Chih-Ping Chao ,  Chin-Hao Su ,  Hsi-Kuei Cheng

IPC: H01L27/06 ,  H01L21/285 ,  H01L21/8249 ,  H01L29/45

CPC classification number: H01L27/0623 ,  H01L21/28518 ,  H01L21/8249 ,  H01L29/45

Abstract: A structure and method for providing a multiple silicide integration is provided. An embodiment comprises forming a first transistor and a second transistor on a substrate. The first transistor is masked and a first silicide region is formed on the second transistor. The second transistor is then masked and a second silicide region is formed on the first transistor, thereby allowing for device specific silicide regions to be formed on the separate devices.

公开(公告)号：US20240355795A1

公开(公告)日：2024-10-24

申请号：US18659033

申请日：2024-05-09

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Dong-Han Shen ,  Chen-Shien Chen ,  Kuo-Chio Liu ,  Hsi-Kuei Cheng ,  Yi-Jen Lai

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/18 ,  H01L25/065

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/20 ,  H01L24/24 ,  H01L25/18 ,  H01L25/0652 ,  H01L2224/24265 ,  H01L2224/25171 ,  H01L2224/2518 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2924/181 ,  H01L2924/3511

Abstract: A package on package structure includes a first package, a plurality of conductive bumps, a second package and an underfill. The conductive bumps are disposed on a second surface of the first package and electrically connected to the first package. The second package is disposed on the second surface of the first package through the conductive bumps, and includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. A shortest distance from an upper surface of the encapsulating material to an upper surface of the semiconductor device is greater than or substantially equal to twice a thickness of the semiconductor device. The underfill is filled between the first package and the second package.

公开(公告)号：US12046588B2

公开(公告)日：2024-07-23

申请号：US17672719

申请日：2022-02-16

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Dong-Han Shen ,  Chen-Shien Chen ,  Kuo-Chio Liu ,  Hsi-Kuei Cheng ,  Yi-Jen Lai

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/20 ,  H01L24/24 ,  H01L25/18 ,  H01L25/0652 ,  H01L2224/24265 ,  H01L2224/25171 ,  H01L2224/2518 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2924/181 ,  H01L2924/3511

Abstract: A package on package structure includes a first package, a plurality of conductive bumps, a second package and an underfill. The conductive bumps are disposed on a second surface of the first package and electrically connected to the first package. The second package is disposed on the second surface of the first package through the conductive bumps, and includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. A shortest distance from an upper surface of the encapsulating material to an upper surface of the semiconductor device is greater than or substantially equal to twice a thickness of the semiconductor device. The underfill is filled between the first package and the second package.

公开(公告)号：US20230369152A1

公开(公告)日：2023-11-16

申请号：US18356243

申请日：2023-07-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Sheng-Huan Chiu ,  Chun-Jen Chen ,  Chen-Shien Chen ,  Kuo-Chio Liu ,  Kuo-Hui Chang ,  Chung-Yi Lin ,  Hsi-Kuei Cheng ,  Yi-Jen Lai

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/3121 ,  H01L21/565 ,  H01L24/03 ,  H01L23/3171 ,  H01L24/09 ,  H01L2924/1811 ,  H01L2224/02379 ,  H01L25/0756

Abstract: A package includes a die, first conductive structures, second conductive structures, and an encapsulant. The die has a rear surface. The first conductive structures and the second conductive structures surround the die. The first conductive structures include cylindrical columns and the second conductive structures include elliptical columns. At least one of the second conductive structures is closer to the die than the first conductive structures. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures.

公开(公告)号：US11437361B2

公开(公告)日：2022-09-06

申请号：US16569078

申请日：2019-09-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Jen Lai ,  Lin Chung-Yi ,  Hsi-Kuei Cheng ,  Chen-Shien Chen ,  Kuo-Chio Liu

IPC: H01L25/00 ,  H01L25/10 ,  H01L23/60 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L25/18 ,  H01L21/683 ,  H01L21/56

Abstract: A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.