公开(公告)号：US20240047330A1

公开(公告)日：2024-02-08

申请号：US18484310

申请日：2023-10-10

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Jonathan Almeria NOQUIL ,  Makarand Ramkrishna KULKARNI ,  Osvaldo Jorge LOPEZ ,  Yiqi TANG ,  Rajen Manicon MURUGAN ,  Liang WAN

IPC分类号： H01L23/498

CPC分类号： H01L23/49822 ,  H01L23/49844 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L24/13

摘要： In some examples, a semiconductor package comprises a multi-layer package substrate. The multi-layer package substrate includes first and second metal layers, the first metal layer positioned above the second metal layer and coupled to the second metal layer by way of a via. The substrate also includes a dielectric covering at least part of the first and second metal layers and the via. The package includes a plated metal layer plated on at least part of the first metal layer and positioned above the dielectric, a combination of the first metal layer and the plated metal layer being thicker than the second metal layer. The package includes a semiconductor die having a device side, the device side vertically aligned with and coupled to the plated metal layer.

公开(公告)号：US11894325B2

公开(公告)日：2024-02-06

申请号：US17294066

申请日：2019-11-13

申请人： ROHM CO., LTD.

发明人： Manato Kurata

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/13 ,  H01L24/29 ,  H01L24/73 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05557 ,  H01L2224/05647 ,  H01L2224/13017 ,  H01L2224/1357 ,  H01L2224/13147 ,  H01L2224/2929 ,  H01L2224/29388 ,  H01L2224/73104

摘要： A semiconductor device includes a semiconductor layer that has a main surface, an electrode pad that is formed on the main surface, a rewiring that has a first wiring surface connected to the electrode pad and a second wiring surface positioned on a side opposite to the first wiring surface and being roughened, the rewiring being formed on the main surface such as to be drawn out to a region outside the electrode pad, and a resin that covers the second wiring surface on the main surface and that seals the rewiring.

公开(公告)号：US20240038733A1

公开(公告)日：2024-02-01

申请号：US18227911

申请日：2023-07-29

申请人： LX SEMICON CO., LTD.

发明人： Tae Ryong KIM ,  Deog Soo KIM

IPC分类号： H01L25/07 ,  H01L25/00 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L25/071 ,  H01L25/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/40 ,  H01L24/37 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/40225 ,  H01L2224/37147 ,  H01L2224/73255

摘要： A semiconductor module according to the present disclosure includes a circuit board having a first surface and a second surface, a first semiconductor device mounted on the first surface of the circuit board, a second semiconductor device mounted on the second surface of the circuit board, a first heat dissipation substrate placed on the top of the first semiconductor device, and a second heat dissipation substrate placed on the top of the second semiconductor device. The first heat dissipation substrate is coupled to a second surface of the first semiconductor device and the second heat dissipation substrate is coupled to a second surface of the second semiconductor device.

公开(公告)号：US20240038704A1

公开(公告)日：2024-02-01

申请号：US17874206

申请日：2022-07-26

申请人： Micron Technology, Inc.

发明人： Faxing Che ,  Hong Wan Ng ,  Yeow Chon Ong

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L24/16 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/81815 ,  H01L2224/81203 ,  H01L2924/37001 ,  H01L2924/3512 ,  H01L2224/16148 ,  H01L2224/16221 ,  H01L2224/11462 ,  H01L2224/13007 ,  H01L2224/13014 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13076 ,  H01L2224/13147 ,  H01L2224/13541 ,  H01L2224/1355 ,  H01L2224/13655 ,  H01L2224/1369 ,  H01L2224/13582

摘要： In some embodiments, a semiconductor device assembly can include a first semiconductor die, a second semiconductor die, and an interconnection structure therebetween. The interconnection structure can directly electrically couple the first and the second semiconductor dies. The interconnection structure can include an inner metallic pillar, an outer metallic shell, a continuous metallic bridging layer, and a dielectric liner. The outer metallic shell can surround and be spaced from the inner metallic pillar, the continuous metallic bridging layer can be over and connected with the inner metallic pillar and the outer metallic shell, and the dielectric liner can be between the inner metallic pillar and the outer metallic shell. In some embodiments, the second semiconductor die can be excluded and the interconnection structure can solely be coupled to the first semiconductor die.

公开(公告)号：US20240038626A1

公开(公告)日：2024-02-01

申请号：US17876558

申请日：2022-07-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kai-Fung Chang ,  Sheng-Feng Weng ,  Ming-Yu Yen ,  Kai-Ming Chiang ,  Wei-Jhan Tsai ,  Chih-Wei Lin ,  Ching-Hua Hsieh

IPC分类号： H01L23/373 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

CPC分类号： H01L23/3735 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/29 ,  H01L23/3128 ,  H01L23/49811 ,  H01L21/4857 ,  H01L21/56 ,  H01L24/94 ,  H01L21/78 ,  H01L2224/32225 ,  H01L2224/29083 ,  H01L2224/29166 ,  H01L2224/29181 ,  H01L2224/94 ,  H01L2224/16227 ,  H01L24/16 ,  H01L2224/73253 ,  H01L24/73 ,  H01L2224/05624 ,  H01L24/05 ,  H01L2224/13147 ,  H01L24/13

摘要： A semiconductor package includes a first redistribution circuit structure, a semiconductor die, and an electrically conductive structure. The semiconductor die is disposed over and electrically coupled to the first redistribution circuit structure. The electrically conductive structure connects a non-active side of the semiconductor die to a conductive feature of the first redistribution circuit structure, where the semiconductor die is thermally couped to the first redistribution circuit structure through the electrically conductive structure, and the electrically conductive structure includes a structure of multi-layer with different materials.

公开(公告)号：US11887956B2

公开(公告)日：2024-01-30

申请号：US17555987

申请日：2021-12-20

申请人： International Business Machines Corporation

发明人： Katsuyuki Sakuma ,  Mukta Ghate Farooq

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L24/05 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1308 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/81815

摘要： A semiconductor device and formation thereof. The semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a plurality of pillars interconnecting the first semiconductor structure and the second semiconductor structure. The plurality of pillars include a first solder layer and a second solder layer, wherein the first solder layer has a higher melting point than the second solder layer.

公开(公告)号：US20240030210A1

公开(公告)日：2024-01-25

申请号：US18223854

申请日：2023-07-19

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Juyeon Jeong ,  Mihyun Kim ,  Sihan Kim ,  Hankyu Seong ,  Jusong Eom ,  Jihye Yeon

IPC分类号： H01L25/18 ,  H01L27/15 ,  H01L23/00

CPC分类号： H01L25/18 ,  H01L27/156 ,  H01L24/73 ,  H01L24/32 ,  H01L24/29 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/29186 ,  H01L2224/29028 ,  H01L2224/32145 ,  H01L2224/13147 ,  H01L2224/13021 ,  H01L2224/16145 ,  H01L2224/73104 ,  H01L2924/059 ,  H01L2924/12041

摘要： A display apparatus includes: a circuit board including a driving circuit; and a pixel array disposed on the circuit board and including pixels, each of the pixels having a plurality of sub-pixels. The pixel array includes: a semiconductor stack, a conductive partition structure and wavelength conversion portions. The semiconductor stack includes LED cells respectively constituting the plurality of sub-pixels. Each of the LED cells includes at least an active layer and a second conductivity-type semiconductor layer. The conductive partition structure is provided between sub-pixel spaces, respectively overlaps the LED cells on the semiconductor stack, and is provided as a first electrode. The wavelength conversion portions are respectively disposed on the sub-pixel spaces.

公开(公告)号：US11876065B2

公开(公告)日：2024-01-16

申请号：US17491496

申请日：2021-09-30

申请人： Texas Instruments Incorporated

发明人： Katleen Fajardo Timbol ,  Salvatore Frank Pavone ,  Rafael Jose Lizares Guevara

IPC分类号： H01L23/00 ,  H01L21/027

CPC分类号： H01L24/13 ,  H01L21/027 ,  H01L24/04 ,  H01L24/11 ,  H01L2221/1068 ,  H01L2224/022 ,  H01L2224/0401 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/014 ,  H01L2924/177

摘要： In a described example, an apparatus includes: a semiconductor die having a device side surface; bond pads on the semiconductor die on the device side surface; post connects having a proximate end on the bond pads and extending from the bond pads to a distal end, the diameter of the post connects at the proximate end being the same as the diameter of the post connects at the distal end; polyimide material covering sides of the post connects and covering at least a portion of the bond pads; and solder bumps on the distal end of the post connects.

公开(公告)号：US11876032B2

公开(公告)日：2024-01-16

申请号：US17504316

申请日：2021-10-18

申请人： Murata Manufacturing Co., Ltd.

发明人： Shinnosuke Takahashi ,  Masayuki Aoike ,  Masatoshi Hase ,  Fumio Harima

IPC分类号： H01L23/373 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L25/00 ,  H01L29/737

CPC分类号： H01L23/3738 ,  H01L23/3736 ,  H01L24/08 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L24/05 ,  H01L24/24 ,  H01L29/7371 ,  H01L2224/05644 ,  H01L2224/08145 ,  H01L2224/1357 ,  H01L2224/13147 ,  H01L2224/13644 ,  H01L2224/24146

摘要： A bond layer including at least one metal region in a plan view is disposed on a surface layer portion of a substrate formed from a semiconductor. A semiconductor element is disposed on the bond layer and includes a first transistor disposed on a first metal region that is a metal region as the at least one metal region of the bond layer and including a collector layer electrically coupled to the first metal region, a base layer disposed on the collector layer, and an emitter layer disposed on the base layer. A first emitter electrode is disposed on the emitter layer of the first transistor. A first conductor protrusion is disposed on the first emitter electrode. The thermal conductivity of the semiconductor material of the surface layer portion is higher than that of each of the collector layer, the base layer, and the emitter layer of the first transistor.

公开(公告)号：US20240015883A1

公开(公告)日：2024-01-11

申请号：US18340097

申请日：2023-06-23

申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD.

发明人： Shuhei Momose

IPC分类号： H05K1/02 ,  H01L23/498 ,  H01L23/00

CPC分类号： H05K1/0296 ,  H01L23/49822 ,  H01L23/49866 ,  H01L24/81 ,  H01L2224/16227 ,  H01L24/16 ,  H01L2224/32225 ,  H01L24/32 ,  H01L2224/73204 ,  H01L24/73 ,  H01L2224/81444 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L24/05 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13113 ,  H01L24/13

摘要： A wiring substrate includes a wiring layer, a protective insulation layer covering the wiring layer, an opening extending through the protective insulation layer and partially exposing an upper surface of the wiring layer, a first plating layer formed inside the opening on the wiring layer that is exposed in the opening, a gap extending between a side surface of the first plating layer and a wall surface of the opening, and a second plating layer entirely covering a surface of the first plating layer in the opening of the protective insulation layer. The first plating layer is formed from nickel or a nickel alloy. The second plating layer is formed from a metal having a higher resistance to oxidation than the metal forming the first plating layer. The second plating layer entirely covers a side surface of the first plating layer that is exposed in the gap.