公开(公告)号：US20230035716A1

公开(公告)日：2023-02-02

申请号：US17387794

申请日：2021-07-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi TANG ,  Rajen Manicon MURUGAN ,  Li JIANG

IPC: H01L23/498 ,  H01L23/13 ,  H01P3/02 ,  H05K1/02

Abstract: In examples, a semiconductor package comprises a ceramic substrate and a horizontal metal layer covered by the ceramic substrate. The metal layer is configured to carry signals in the 5 GHz to 38 GHz frequency range. The package also includes a vertical castellation on an outer surface of the ceramic substrate, the castellation coupled to the metal layer and having a height ranging from 0.10 mm to 0.65 mm.

公开(公告)号：US20220384369A1

公开(公告)日：2022-12-01

申请号：US17335010

申请日：2021-05-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi TANG ,  Li JIANG ,  Rajen Manicon MURUGAN

IPC: H01L23/58 ,  H01L23/552 ,  H01L23/00

Abstract: In examples, a semiconductor package comprises a ceramic substrate and first and second metal layers covered by the ceramic substrate. The first metal layer is configured to carry signals at least in a 20 GHz to 28 GHz frequency range. The package comprises a semiconductor die positioned above the first and second metal layers and coupled to the first metal layer. The package comprises a ground shield positioned in a horizontal plane between the semiconductor die and the first metal layer, the ground shield including an orifice above a portion of the first metal layer. The package includes a metal seal ring coupled to a top surface of the ceramic substrate, the metal seal ring having a segment that is vertically aligned with a segment of the ground shield. The segment of the ground shield is between the orifice of the ground shield and a horizontal center of the ground shield. The package comprises a metal lid coupled to a top surface of the metal seal ring.

公开(公告)号：US20240047330A1

公开(公告)日：2024-02-08

申请号：US18484310

申请日：2023-10-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jonathan Almeria NOQUIL ,  Makarand Ramkrishna KULKARNI ,  Osvaldo Jorge LOPEZ ,  Yiqi TANG ,  Rajen Manicon MURUGAN ,  Liang WAN

IPC: H01L23/498

CPC classification number: H01L23/49822 ,  H01L23/49844 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L24/13

Abstract: In some examples, a semiconductor package comprises a multi-layer package substrate. The multi-layer package substrate includes first and second metal layers, the first metal layer positioned above the second metal layer and coupled to the second metal layer by way of a via. The substrate also includes a dielectric covering at least part of the first and second metal layers and the via. The package includes a plated metal layer plated on at least part of the first metal layer and positioned above the dielectric, a combination of the first metal layer and the plated metal layer being thicker than the second metal layer. The package includes a semiconductor die having a device side, the device side vertically aligned with and coupled to the plated metal layer.

公开(公告)号：US20230101847A1

公开(公告)日：2023-03-30

申请号：US17491378

申请日：2021-09-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Chittranjan Mohan GUPTA ,  Yiqi TANG ,  Rajen Manicon MURUGAN ,  Jie CHEN ,  Tianyi LUO

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498 ,  H01L25/00 ,  H01L21/56

Abstract: In examples, a semiconductor package comprises a substrate and multiple columns of semiconductor dies positioned approximately in parallel along a length of the substrate. The package also includes multiple passive components positioned between the multiple columns of semiconductor dies, the multiple passive components angled between 30 and 60 degrees relative to the length of the substrate, a pair of the multiple passive components having a gap therebetween that is configured to permit mold compound flow through capillary action. The package also includes a mold compound covering the substrate, the multiple columns of semiconductor dies, and the multiple passive components.

公开(公告)号：US20220181241A1

公开(公告)日：2022-06-09

申请号：US17334491

申请日：2021-05-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jonathan Almeria NOQUIL ,  Makarand Ramkrishna KULKARNI ,  Osvaldo Jorge LOPEZ ,  Yiqi TANG ,  Rajen Manicon MURUGAN ,  Liang WAN

IPC: H01L23/498

Abstract: In some examples, a semiconductor package comprises a multi-layer package substrate. The multi-layer package substrate includes first and second metal layers, the first metal layer positioned above the second metal layer and coupled to the second metal layer by way of a via. The substrate also includes a dielectric covering at least part of the first and second metal layers and the via. The package includes a plated metal layer plated on at least part of the first metal layer and positioned above the dielectric, a combination of the first metal layer and the plated metal layer being thicker than the second metal layer. The package includes a semiconductor die having a device side, the device side vertically aligned with and coupled to the plated metal layer.

公开(公告)号：US20250126813A1

公开(公告)日：2025-04-17

申请号：US18680535

申请日：2024-05-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sylvester ANKAMAH-KUSI ,  Jonathan Almeria NOQUIL ,  Rajen Manicon MURUGAN

IPC: H01F27/28 ,  H01F27/32 ,  H01F41/04 ,  H01F41/12

Abstract: In examples, a semiconductor package comprises a semiconductor die, and an inductor coupled to the semiconductor die. The inductor comprises a first metal coil having a first end coupled to the semiconductor die and a second end; a second metal coil vertically spaced from the first metal coil and having a third end coupled to the second end and a fourth end coupled to the semiconductor die; a magnetic mold compound (MMC) between the first and second metal coils, the MMC including conductive ions; and an insulative layer between the first and metal coils.

公开(公告)号：US20230197642A1

公开(公告)日：2023-06-22

申请号：US18172208

申请日：2023-02-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi TANG ,  Li JIANG ,  Rajen Manicon MURUGAN

IPC: H01L23/58 ,  H01L23/00 ,  H01L23/552

CPC classification number: H01L23/585 ,  H01L23/564 ,  H01L23/562 ,  H01L23/552

Abstract: In examples, a semiconductor package comprises a ceramic substrate and first and second metal layers covered by the ceramic substrate. The first metal layer is configured to carry signals at least in a 20 GHz to 28 GHz frequency range. The package comprises a semiconductor die positioned above the first and second metal layers and coupled to the first metal layer. The package comprises a ground shield positioned in a horizontal plane between the semiconductor die and the first metal layer, the ground shield including an orifice above a portion of the first metal layer. The package includes a metal seal ring coupled to a top surface of the ceramic substrate, the metal seal ring having a segment that is vertically aligned with a segment of the ground shield. The segment of the ground shield is between the orifice of the ground shield and a horizontal center of the ground shield. The package comprises a metal lid coupled to a top surface of the metal seal ring.

公开(公告)号：US20230131441A1

公开(公告)日：2023-04-27

申请号：US17741560

申请日：2022-05-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi TANG ,  Rajen Manicon MURUGAN

IPC: H01P3/00 ,  H01P3/06 ,  H05K1/02 ,  H05K1/11 ,  H05K3/46 ,  H05K3/40

Abstract: One example includes an antenna-on-package (AoP) system. The system includes a first transmission line patterned on a first metal layer. The first metal layer can be arranged to be coupled on a printed circuit board (PCB). The system also includes an antenna portion patterned on a second metal layer. The first and second metal layers can be separated by at least one dielectric layer. The system further includes a coaxial transition portion comprising a via configured to communicatively couple the first transmission line on the first metal layer to a second transmission line on the second metal layer. The second transmission line can be coupled to the antenna portion.

公开(公告)号：US20200258825A1

公开(公告)日：2020-08-13

申请号：US16787327

申请日：2020-02-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi TANG ,  Liang WAN ,  William Todd HARRISON ,  Manu Joseph PRAKUZHY ,  Rajen Manicon MURUGAN

IPC: H01L23/495 ,  H01L23/00 ,  H02M3/158

Abstract: In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.

公开(公告)号：US20250167125A1

公开(公告)日：2025-05-22

申请号：US18920738

申请日：2024-10-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sylvester ANKAMAH-KUSI ,  Guangxu LI ,  Rajen Manicon MURUGAN ,  Usman CHAUDHRY

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L23/14 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

Abstract: In examples, a semiconductor package includes a substrate including a build-up film isolation layer and first and second pre-preg layers contacting opposing lateral sides of the build-up film isolation layer, the first pre-preg layer including a first metallization, and the second pre-preg layer including a second metallization not in physical contact with the first metallization. The package also includes solder mask layers on top and bottom surfaces of the substrate, a first semiconductor die coupled to the first metallization, and a second semiconductor die coupled to the second metallization, the first and second semiconductor dies configured to operate in separate voltage domains. The package also includes a mold compound covering the substrate and the first and second semiconductor dies.