公开(公告)号：US08637873B2

公开(公告)日：2014-01-28

申请号：US13164155

申请日：2011-06-20

Applicant: Kazutaka Takagi

Inventor： Kazutaka Takagi

IPC: H01L29/04

CPC classification number: H01L23/047 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/7786 ,  H01L29/812 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2223/6644 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13051 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/16195 ,  H01L2924/16747 ,  H01L2924/173 ,  H01L2924/177 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: According to one embodiment, provided is a package and high frequency terminal structure for the same including: a conductive base plate; a semiconductor device disposed on the conductive base plate; a metal wall disposed on the conductive base plate to house the semiconductor device; a through-hole disposed in input and output units of the metal wall; a lower layer feed through inserted into the through-hole and disposed on the conductive base plate; and an upper layer feed through disposed on the lower layer feed through, and adhered to a sidewall of the metal wall. The lower layer feed through is surrounded by the metal wall.

Abstract translation: 根据一个实施例，提供了一种用于其的封装和高频端子结构，包括：导电基板; 设置在导电基板上的半导体器件; 设置在所述导电基板上以容纳所述半导体器件的金属壁; 设置在金属壁的输入和输出单元中的通孔; 下层进料通过插入通孔并设置在导电基板上; 并且通过设置在下层上的上层进料通过并附着在金属壁的侧壁上。 下层进料通过金属壁包围。

公开(公告)号：US20120234592A1

公开(公告)日：2012-09-20

申请号：US13417785

申请日：2012-03-12

Applicant: Kazutaka TAKAGI

Inventor： Kazutaka TAKAGI

IPC: H05K1/11

CPC classification number: H01L23/047 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/7786 ,  H01L29/812 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13051 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/16195 ,  H01L2924/16747 ,  H01L2924/173 ,  H01L2924/177 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package includes: a metal wall disposed on a conductive base plate; a through-hole disposed in input/output portions of the metal wall; a lower layer feed through disposed on the conductive base plate; a wiring pattern disposed on the lower layer feed through; an upper layer feed through disposed on a part of the lower layer feed through and a part of the wiring pattern; and a terminal disposed on the wiring pattern, wherein a width of a part of the lower layer feed through and a width of the upper layer feed through are wider than a width of the through-hole, the lower layer feed through is adhered to a side surface of the metal wall, the upper layer feed through is adhered to the side surface of metal wall, and an air layer is formed between the wiring pattern and an internal wall of the through-hole.

Abstract translation: 包装包括：设置在导电基板上的金属壁; 设置在金属壁的输入/输出部分中的通孔; 通过设置在导电基板上的下层馈电; 布置在下层上的布线图案馈送; 布置在所述下层的一部分上的上层馈送通过所述布线图案的一部分; 以及设置在布线图案上的端子，其中下层馈送部分的宽度和上层馈送的宽度比通孔的宽度宽，下层馈通被粘附到 金属壁的侧表面，上层进料通过粘附到金属壁的侧表面，并且在布线图案和通孔的内壁之间形成空气层。

公开(公告)号：US11876065B2

公开(公告)日：2024-01-16

申请号：US17491496

申请日：2021-09-30

Applicant: Texas Instruments Incorporated

Inventor： Katleen Fajardo Timbol ,  Salvatore Frank Pavone ,  Rafael Jose Lizares Guevara

IPC: H01L23/00 ,  H01L21/027

CPC classification number: H01L24/13 ,  H01L21/027 ,  H01L24/04 ,  H01L24/11 ,  H01L2221/1068 ,  H01L2224/022 ,  H01L2224/0401 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/014 ,  H01L2924/177

Abstract: In a described example, an apparatus includes: a semiconductor die having a device side surface; bond pads on the semiconductor die on the device side surface; post connects having a proximate end on the bond pads and extending from the bond pads to a distal end, the diameter of the post connects at the proximate end being the same as the diameter of the post connects at the distal end; polyimide material covering sides of the post connects and covering at least a portion of the bond pads; and solder bumps on the distal end of the post connects.

公开(公告)号：US08471382B2

公开(公告)日：2013-06-25

申请号：US13417785

申请日：2012-03-12

Applicant: Kazutaka Takagi

Inventor： Kazutaka Takagi

IPC: H01L23/34

CPC classification number: H01L23/047 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/7786 ,  H01L29/812 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13051 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/16195 ,  H01L2924/16747 ,  H01L2924/173 ,  H01L2924/177 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package includes: a metal wall disposed on a conductive base plate; a through-hole disposed in input/output portions of the metal wall; a lower layer feed through disposed on the conductive base plate; a wiring pattern disposed on the lower layer feed through; an upper layer feed through disposed on a part of the lower layer feed through and a part of the wiring pattern; and a terminal disposed on the wiring pattern, wherein a width of a part of the lower layer feed through and a width of the upper layer feed through are wider than a width of the through-hole, the lower layer feed through is adhered to a side surface of the metal wall, the upper layer feed through is adhered to the side surface of metal wall, and an air layer is formed between the wiring pattern and an internal wall of the through-hole.

Abstract translation: 包装包括：设置在导电基板上的金属壁; 设置在金属壁的输入/输出部分中的通孔; 通过设置在导电基板上的下层馈电; 布置在下层上的布线图案馈送; 布置在所述下层的一部分上的上层馈送通过所述布线图案的一部分; 以及设置在布线图案上的端子，其中下层馈送部分的宽度和上层馈送的宽度比通孔的宽度宽，下层馈通被粘附到 金属壁的侧表面，上层进料粘附到金属壁的侧表面，并且在布线图案和通孔的内壁之间形成空气层。

公开(公告)号：US20240153903A1

公开(公告)日：2024-05-09

申请号：US18414125

申请日：2024-01-16

Applicant: Texas Instruments Incorporated

Inventor： Katleen Fajardo Timbol ,  Salvatore Frank Pavone ,  Rafael Jose Lizares Guevara

IPC: H01L23/00 ,  H01L21/027

CPC classification number: H01L24/13 ,  H01L21/027 ,  H01L24/04 ,  H01L24/11 ,  H01L2221/1068 ,  H01L2224/022 ,  H01L2224/0401 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/014 ,  H01L2924/177

Abstract: In a described example, an apparatus includes: a semiconductor die having a device side surface; bond pads on the semiconductor die on the device side surface; post connects having a proximate end on the bond pads and extending from the bond pads to a distal end, the diameter of the post connects at the proximate end being the same as the diameter of the post connects at the distal end; polyimide material covering sides of the post connects and covering at least a portion of the bond pads; and solder bumps on the distal end of the post connects.

公开(公告)号：US20240096748A1

公开(公告)日：2024-03-21

申请号：US18453026

申请日：2023-08-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taejun JEON ,  Yongkwan LEE ,  Gyuhyeong KIM ,  Seunghwan KIM ,  Jongwan KIM ,  Junwoo PARK

IPC: H01L23/473 ,  H01L23/00

CPC classification number: H01L23/473 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16052 ,  H01L2224/16175 ,  H01L2224/16225 ,  H01L2224/32221 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/17151 ,  H01L2924/172 ,  H01L2924/177

Abstract: A chip protection device includes a protection frame extending around side surfaces of a semiconductor chip mounted on a substrate. The protection frame includes a plurality of side walls, each wall facing and spaced apart from a respective side surface of the semiconductor chip, and a plurality of upper walls, each upper wall extending inward from an upper portion of a respective side wall toward the semiconductor chip. A plurality of apertures are formed through the side walls and through which a fluid enters and exits. The protection frame defines an inner space in which the fluid can flow via the plurality of apertures. Heat from the side surfaces of the semiconductor chip is transferred to the fluid in the inner space.

公开(公告)号：US20120126246A1

公开(公告)日：2012-05-24

申请号：US13164155

申请日：2011-06-20

Applicant: Kazutaka TAKAGI

Inventor： Kazutaka TAKAGI

IPC: H01L23/043 ,  H01L29/205 ,  H01L29/161 ,  H01L29/20

CPC classification number: H01L23/047 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/7786 ,  H01L29/812 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2223/6644 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13051 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/16195 ,  H01L2924/16747 ,  H01L2924/173 ,  H01L2924/177 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: According to one embodiment, provided is a package and high frequency terminal structure for the same including: a conductive base plate; a semiconductor device disposed on the conductive base plate; a metal wall disposed on the conductive base plate to house the semiconductor device; a through-hole disposed in input and output units of the metal wall; a lower layer feed through inserted into the through-hole and disposed on the conductive base plate; and an upper layer feed through disposed on the lower layer feed through, and adhered to a sidewall of the metal wall. The lower layer feed through is surrounded by the metal wall.

Abstract translation: 根据一个实施例，提供了一种用于其的封装和高频端子结构，包括：导电基板; 设置在导电基板上的半导体器件; 设置在所述导电基板上以容纳所述半导体器件的金属壁; 设置在金属壁的输入和输出单元中的通孔; 下层进料通过插入通孔并设置在导电基板上; 并且通过设置在下层上的上层进料通过并附着在金属壁的侧壁上。 下层进料通过金属壁包围。