公开(公告)号：US20060033189A1

公开(公告)日：2006-02-16

申请号：US11201726

申请日：2005-08-11

Applicant: Belgacem Haba ,  Masud Beroz ,  Glenn Urbish ,  David Tuckerman

Inventor： Belgacem Haba ,  Masud Beroz ,  Glenn Urbish ,  David Tuckerman

IPC: H01L23/02

CPC classification number: B81B7/007 ,  H03H3/02 ,  H03H9/0547 ,  H03H9/059 ,  H03H9/1057 ,  H03H9/1092

Abstract: As disclosed herein, structures and methods are provided for forming capped chips. As provided by the disclosed method, a metal base pattern is formed on a chip insulated from wiring of the chip, and a cap is formed including a metal. The cap is joined to the metal base pattern on the chip to form the capped chip. In one embodiment, a front surface of the chip is exposed which extends from a contact of the chip to an edge of the chip. In another embodiment, a conductive connection is formed to the contact, the conductive connection extending from the contact to a terminal at an exposed plane above the front surface of the chip.

Abstract translation: 如本文所公开的，提供了用于形成加盖芯片的结构和方法。 通过所公开的方法提供，在与芯片的布线绝缘的芯片上形成金属基底图案，并且形成包括金属的盖。 盖子连接到芯片上的金属基底图案以形成封盖的芯片。 在一个实施例中，芯片的前表面被暴露，其从芯片的触点延伸到芯片的边缘。 在另一个实施例中，导电连接形成于接触件，导电连接件从接触件延伸到芯片前表面上的暴露平面处的端子。

公开(公告)号：US20050181544A1

公开(公告)日：2005-08-18

申请号：US11014439

申请日：2004-12-16

Applicant: Belgacem Haba ,  Masud Beroz ,  Ronald Green ,  Ilyas Mohammed ,  Stuart Wilson ,  Wael Zohni ,  Yoichi Kubota ,  Jesse Thompson

Inventor： Belgacem Haba ,  Masud Beroz ,  Ronald Green ,  Ilyas Mohammed ,  Stuart Wilson ,  Wael Zohni ,  Yoichi Kubota ,  Jesse Thompson

IPC: H01L21/44

CPC classification number: H01L23/49811 ,  G01R1/06744 ,  G01R1/0735 ,  H01L21/563 ,  H01L23/4985 ,  H01L24/12 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13187 ,  H01L2224/13188 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/17 ,  H01L2224/1703 ,  H01L2224/48091 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/85399 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2224/13099 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A microelectronic package includes a microelectronic element having faces and contacts and a flexible substrate spaced from and overlying a first face of the microelectronic element. The package also includes a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, wherein at least some of the conductive posts are electrically interconnected with the microelectronic element, and a plurality of support elements supporting the flexible substrate over the microelectronic element. The conductive posts are offset from the support elements to facilitate flexure of the substrate and movement of the posts relative to the microelectronic element.

Abstract translation: 微电子封装包括具有面和触点的微电子元件和与微电子元件的第一面间隔开并且覆盖其上的柔性基板。 该封装还包括从柔性基板延伸并从远离微电子元件的第一面突出的多个导电柱，其中至少一些导电柱与微电子元件电互连，以及多个支撑元件 微电子元件上的柔性衬底。 导电柱从支撑元件偏移以便于基板的挠曲和柱相对于微电子元件的移动。

公开(公告)号：US20050133899A1

公开(公告)日：2005-06-23

申请号：US11014506

申请日：2004-12-15

Applicant: Belgacem Haba ,  Masud Beroz

Inventor： Belgacem Haba ,  Masud Beroz

IPC: H01L23/31 ,  H01L25/065 ,  H01L25/10 ,  H01L23/02

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L2224/1624 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2924/15311 ,  H01L2924/19107

Abstract: A multi-layer electronic package having polymeric tape layers, where at least one of the polymeric tape layers has a via, through hole, or aperture therein to pass wiring between the layers. This enables a balance of package size, adhesive thickness, chip access, inventory management, package width, JEDEC ball out, and die exposure. The polymeric tape layers have surface circuits (e.g., leads, pads, and wiring) located on the surface.

Abstract translation: 一种具有聚合物带层的多层电子封装，其中至少一个聚合物带层具有通孔，通孔或孔，以在层之间通过布线。 这使得包装尺寸，粘合剂厚度，芯片访问，库存管理，包装宽度，JEDEC球出口和模具曝光之间的平衡。 聚合物带层具有位于表面上的表面电路（例如引线，焊盘和布线）。

公开(公告)号：US6063648A

公开(公告)日：2000-05-16

申请号：US181901

申请日：1998-10-29

Applicant: Masud Beroz ,  Belgacem Haba ,  Christopher M. Pickett

Inventor： Masud Beroz ,  Belgacem Haba ,  Christopher M. Pickett

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L21/44

CPC classification number: H01L23/49827 ,  H01L21/4846 ,  H01L21/563 ,  H01L2224/73203 ,  H01L2924/01079

Abstract: A component for making microelectronic units includes a grid of interspersed leads with ends of the various leads being connected to one another by frangible elements. One end of each lead is bonded to a top element and the other end of each lead is bonded to a bottom element. The top and bottom elements are moved away from one another, thereby breaking the frangible elements and deforming the leads towards a vertically extensive disposition. A flowable composition such as dielectric material may be injected around the leads during or after the moving step. The resulting unit may be used to form permanent or temporary connections between microelectronic elements.

公开(公告)号：US09125333B2

公开(公告)日：2015-09-01

申请号：US13183870

申请日：2011-07-15

Applicant: Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Belgacem Haba ,  Piyush Savalia ,  Craig Mitchell

Inventor： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Belgacem Haba ,  Piyush Savalia ,  Craig Mitchell

IPC: H05K1/03 ,  H05K1/09 ,  H05K3/40

CPC classification number: H01L24/05 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05169 ,  H01L2224/056 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2924/013 ,  H05K1/09 ,  H05K3/4007 ,  H05K2201/032 ,  H05K2201/0326 ,  H05K2201/0338

Abstract: Barrier layers for use in electrical applications. In some embodiments the barrier layer is a laminated barrier layer. In some embodiments the barrier layer includes a graded barrier layer.

Abstract translation: 用于电气应用的阻隔层。 在一些实施例中，阻挡层是层压阻挡层。 在一些实施例中，阻挡层包括梯度阻挡层。

公开(公告)号：US08988895B2

公开(公告)日：2015-03-24

申请号：US13215725

申请日：2011-08-23

Applicant: Ilyas Mohammed ,  Belgacem Haba

Inventor： Ilyas Mohammed ,  Belgacem Haba

IPC: H05K7/04 ,  H01B7/00 ,  H01R43/00 ,  H01L21/50 ,  H05K3/46 ,  H01L23/498 ,  H01L21/48 ,  H01R12/52

CPC classification number: H05K3/4602 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01R12/523 ,  H05K2201/10378 ,  H05K2203/0235 ,  Y10T29/49176

Abstract: An interconnection element is disclosed that includes a plurality of drawn metal conductors, a dielectric layer, and opposed surfaces having a plurality of wettable contacts thereon. The conductors may include grains having lengths oriented in a direction between the first and second ends of the conductors. A dielectric layer for insulating the conductors may have first and second opposed surfaces and a thickness less than 1 millimeter between the first and second surface. One or more conductors may be configured to carry a signal to or from a microelectronic element. First and second wettable contacts may be used to bond the interconnection element to at least one of a microelectronic element and a circuit panel. The wettable contacts may match a spatial distribution of element contacts at a face of a microelectronic element or of circuit contacts exposed at a face of component other than the microelectronic element.

Abstract translation: 公开了一种互连元件，其包括多个拉制的金属导体，电介质层和在其上具有多个可湿接触点的相对表面。 导体可以包括具有沿导体的第一和第二端之间的方向定向的长度的晶粒。 用于绝缘导体的电介质层可以具有第一和第二相对表面，并且在第一和第二表面之间可以具有小于1毫米的厚度。 一个或多个导体可以被配置为将信号传送到微电子元件或从微电子元件传送信号。 可以使用第一和第二可湿触点将互连元件接合到微电子元件和电路板中的至少一个。 可湿性触点可以匹配微电子元件的表面处的元件触点的空间分布或暴露在微电子元件以外的部件的表面处的电路触点。

公开(公告)号：US08937361B2

公开(公告)日：2015-01-20

申请号：US13114243

申请日：2011-05-24

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: H01L31/0232 ,  H01L27/146

CPC classification number: H01L27/14625 ,  H01L27/1461 ,  H01L27/14629 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14687

Abstract: A microelectronic image sensor assembly for backside illumination and method of making same are provided. The assembly includes a microelectronic element having contacts exposed at a front face and light sensing elements arranged to receive light of different wavelengths through a rear face. A semiconductor region has a first thickness between the first light sensing element and the rear face and a second thickness between the second light sensing element and the rear face such that the first and second light sensing elements receive light of substantially the same intensity. A dielectric region is provided at least substantially filling a space of the semiconductor region adjacent at least one of the light sensing elements. The dielectric region may include at least one light guide.

Abstract translation: 提供了一种用于背面照明的微电子图像传感器组件及其制造方法。 该组件包括具有在正面暴露的触点的微电子元件和被布置成通过后表面接收不同波长的光的光感测元件。 半导体区域在第一光感测元件和后表面之间具有第一厚度，并且在第二光感测元件和后表面之间具有第二厚度，使得第一和第二光感测元件接收基本上相同强度的光。 提供至少基本上填充与至少一个光感测元件相邻的半导体区域的空间的电介质区域。 电介质区域可以包括至少一个光导。

公开(公告)号：US08916781B2

公开(公告)日：2014-12-23

申请号：US13296785

申请日：2011-11-15

Applicant: Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Cyprian Emeka Uzoh

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Cyprian Emeka Uzoh

IPC: H05K1/11 ,  H05K1/03 ,  H05K1/09 ,  H05K1/00 ,  H01L23/498 ,  H01R12/71 ,  H05K3/42

CPC classification number: H05K1/0271 ,  H01L23/49827 ,  H01L2924/0002 ,  H01R12/714 ,  H05K1/114 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09645 ,  H05K2201/10378 ,  H05K2203/0242 ,  H05K2203/025 ,  Y10T29/49165 ,  H01L2924/00

Abstract: An interconnection component includes an element with an opening, a plurality of conductors electrically insulted from one another extending through the opening, and a plurality of second contacts electrically insulated from one another. The element is comprised of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. At least some of the conductors extend along at least one inner surface of the opening. The conductors define a plurality of wettable first contacts at the first surface. The first contacts are at least partially aligned with the opening in a direction of the thickness and electrically insulated from one another.

Abstract translation: 互连部件包括具有开口的元件，延伸穿过开口彼此电绝缘的多个导体以及彼此电绝缘的多个第二触点。 该元件由热膨胀系数小于10ppm /℃的材料构成。 至少一些导体沿开口的至少一个内表面延伸。 导体在第一表面限定多个可润湿的第一接触。 第一触点在厚度方向上与开口至少部分地对齐，并且彼此电绝缘。

公开(公告)号：US08884432B2

公开(公告)日：2014-11-11

申请号：US13155845

申请日：2011-06-08

Applicant: Kazuo Sakuma ,  Philip Damberg ,  Belgacem Haba

Inventor： Kazuo Sakuma ,  Philip Damberg ,  Belgacem Haba

IPC: H05K1/09 ,  H01L23/498

CPC classification number: H01L21/4853 ,  H01L23/3142 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/01 ,  H01L24/15 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0284 ,  H05K1/0306 ,  H05K1/09 ,  H05K3/002 ,  H05K2201/0166 ,  H01L2924/00

Abstract: An interconnection substrate includes a plurality of electrically conductive elements of at least one wiring layer defining first and second lateral directions. Electrically conductive projections for bonding to electrically conductive contacts of at least one component external to the substrate, extend from the conductive elements above the at least one wiring layer. The conductive projections have end portions remote from the conductive elements and neck portions between the conductive elements and the end portions. The end portions have lower surfaces extending outwardly from the neck portions in at least one of the lateral directions. The substrate further includes a dielectric layer overlying the conductive elements and extending upwardly along the neck portions at least to the lower surfaces. At least portions of the dielectric layer between the conductive projections are recessed below a height of the lower surfaces.

Abstract translation: 互连衬底包括限定第一和第二横向方向的至少一个布线层的多个导电元件。 导电突起，用于粘合到基板外部的至少一个部件的导电触点，从导电元件延伸到至少一个布线层之上。 导电突起具有远离导电元件的端部和导电元件与端部之间的颈部。 端部具有在至少一个横向方向上从颈部部分向外延伸的下表面。 衬底还包括覆盖导电元件并且沿着颈部部分至少向下表面向上延伸的电介质层。 导电突起之间的电介质层的至少部分凹陷在下表面的高度之下。

公开(公告)号：US08772946B2

公开(公告)日：2014-07-08

申请号：US13492064

申请日：2012-06-08

Applicant: Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Terrence Caskey ,  Kishor V. Desai ,  Huailiang Wei ,  Craig Mitchell ,  Belgacem Haba

Inventor： Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Terrence Caskey ,  Kishor V. Desai ,  Huailiang Wei ,  Craig Mitchell ,  Belgacem Haba

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/34 ,  H01L21/76841 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/32105 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/81805

Abstract: A component can include a substrate and a conductive via extending within an opening in the substrate. The substrate can have first and second opposing surfaces. The opening can extend from the first surface towards the second surface and can have an inner wall extending away from the first surface. A dielectric material can be exposed at the inner wall. The conductive via can define a relief channel within the opening adjacent the first surface. The relief channel can have an edge within a first distance from the inner wall in a direction of a plane parallel to and within five microns below the first surface, the first distance being the lesser of one micron and five percent of a maximum width of the opening in the plane. The edge can extend along the inner wall to span at least five percent of a circumference of the inner wall.

Abstract translation: 部件可以包括在基板的开口内延伸的基板和导电通孔。 基底可以具有第一和第二相对表面。 开口可以从第一表面延伸到第二表面，并且可以具有远离第一表面延伸的内壁。 电介质材料可以在内壁暴露。 导电通孔可以在邻近第一表面的开口内限定释放通道。 释放通道可以具有在与第一表面平行且在五微米以内的平面的方向上离内壁的第一距离内的边缘，第一距离是最小宽度的一微米和百分之五的最小宽度 在飞机上开了 边缘可以沿着内壁延伸以跨越内壁的圆周的至少百分之五。