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公开(公告)号:US20170084741A1
公开(公告)日:2017-03-23
申请号:US14859165
申请日:2015-09-18
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yu-Chang LIN , Chun-Feng NIEH , Huicheng CHANG , Hou-Yu CHEN , Yong-Yan LU
CPC classification number: H01L27/0924 , H01L21/02529 , H01L21/02532 , H01L21/0262 , H01L21/26513 , H01L21/2658 , H01L21/26586 , H01L21/26593 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823878 , H01L27/1211 , H01L29/165 , H01L29/495 , H01L29/4966 , H01L29/4975 , H01L29/66545 , H01L29/6656 , H01L29/66795 , H01L29/66803 , H01L29/6681 , H01L29/7842 , H01L29/7846 , H01L29/7848 , H01L29/785 , H01L29/7851 , H01L29/7855
Abstract: A semiconductor device includes a substrate, a fin structure and an isolation layer formed on the substrate and adjacent to the fin structure. The semiconductor device includes a gate structure formed on at least a portion of the fin structure and the isolation layer. The semiconductor device includes an epitaxial layer including a strained material that provides stress to a channel region of the fin structure. The epitaxial layer has a first region and a second region, in which the first region has a first doping concentration of a first doping agent and the second region has a second doping concentration of a second doping agent. The first doping concentration is greater than the second doping concentration. The epitaxial layer is doped by ion implantation using phosphorous dimer.
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公开(公告)号:US20160225906A1
公开(公告)日:2016-08-04
申请号:US14613663
申请日:2015-02-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
Inventor: Tsan-Chun WANG , Ziwei FANG , Chien-Tai CHAN , Da-Wen LIN , Huicheng CHANG
IPC: H01L29/78 , H01L21/266 , H01L21/324 , H01L29/66
CPC classification number: H01L29/7856 , H01L21/2253 , H01L21/266 , H01L21/324 , H01L29/66795
Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a doped region in an upper portion of the substrate. The doped region is doped with first dopants of a first conduction type. The semiconductor device structure includes one fin structure over the substrate. A first dopant concentration of the doped region exposed by the fin structure is greater than a second dopant concentration of the doped region covered by the fin structure. The semiconductor device structure includes an isolation layer over the substrate and at two opposite sides of the fin structure. The semiconductor device structure includes a gate over the isolation layer and the fin structure.
Abstract translation: 提供半导体器件结构。 半导体器件结构包括在衬底的上部具有掺杂区的衬底。 掺杂区域掺杂有第一导电类型的第一掺杂剂。 半导体器件结构包括在衬底上的一个鳍结构。 通过鳍结构暴露的掺杂区域的第一掺杂剂浓度大于由鳍结构覆盖的掺杂区域的第二掺杂剂浓度。 半导体器件结构包括在衬底上并在鳍结构的两个相对侧的隔离层。 半导体器件结构包括隔离层上的栅极和鳍结构。
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公开(公告)号:US20240377263A1
公开(公告)日:2024-11-14
申请号:US18784735
申请日:2024-07-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tz-Shian CHEN , Yi-Chao WANG , Wen-Yen CHEN , Li-Ting WANG , Huicheng CHANG , Yee-Chia YEO
IPC: G01K11/125 , H01L21/66 , H01L21/67
Abstract: A temperature measuring apparatus for measuring a temperature of a substrate is described. A light emitting source that emits light signals such as laser pulses are applied to the substrate. A detector on the other side of the light emitting source receives the reflected laser pulses. The detector further receives emission signals associated with temperature or energy density that is radiated from the surface of the substrate. The temperature measuring apparatus determines the temperature of the substrate during a thermal process using the received laser pulses and the emission signals. To improve the signal to noise ratio of the reflected laser pulses, a polarizer may be used to polarize the laser pulses to have a S polarization. The angle in which the polarized laser pulses are applied towards the substrate may also be controlled to enhance the signal to noise ratio at the detector's end.
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公开(公告)号:US20230068065A1
公开(公告)日:2023-03-02
申请号:US17461271
申请日:2021-08-30
Applicant: Taiwan Semiconductor Manufacturing Co.,Ltd.
Inventor: Mrunal Abhijith KHADERBAD , Sathaiya Mahaveer DHANYAKUMAR , Huicheng CHANG , Keng-Chu LIN , Winnie Victoria Wei-Ning CHEN
IPC: H01L21/822 , H01L21/8234 , H01L27/092
Abstract: A semiconductor device includes a first transistor device of a first type. The first transistor includes first nanostructures, a first pair of source/drain structures, and a first gate electrode on the first nanostructures. The semiconductor device also includes a second transistor device of a second type formed over the first transistor device. The second transistor device includes second nanostructures over the first nanostructures, a second pair of source/drain structures over the first pair or source/drain structures, and a second gate electrode on the second nanostructures and over the first nanostructures. The semiconductor device also includes a first isolation structure between the first and second nanostructures. The semiconductor device further includes a second isolation structure in contact with a top surface of the first pair of source/drain structures. The semiconductor device also includes a seed layer between the second isolation structure and the second pair of source/drain structures.
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公开(公告)号:US20230067088A1
公开(公告)日:2023-03-02
申请号:US17461672
申请日:2021-08-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Han-De CHEN , Yun-Chen TENG , Chen-Fong TSAI , Jyh-Cherng SHEU , Huicheng CHANG , Yee-Chia YEO
Abstract: The present disclosure provides a substrate bonding apparatus capable of temperature monitoring and temperature control. The substrate bonding apparatus comprises a fluid cooling module and a sensor module for detecting temperatures at multiple zones (e.g., two or more zones) within a substrate. The substrate bonding apparatus according to the present disclosure achieves temperature stabilization within the substrate. The substrate bonding apparatus further improves bonding process performance by reducing distortion residual, reducing bubbles on edges of the substrate, and reducing non-bonded area within the substrate.
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公开(公告)号:US20190312143A1
公开(公告)日:2019-10-10
申请号:US15949273
申请日:2018-04-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jyun-Hao LIN , Chun-Feng NIEH , Huicheng CHANG , Yu-Chang LIN
IPC: H01L29/78 , H01L29/66 , H01L29/10 , H01L29/08 , H01L29/167 , H01L29/36 , H01L21/265 , H01L29/165 , H01L27/092 , H01L21/8238 , H01L21/02
Abstract: An embodiment is a method of manufacturing a semiconductor device. The method includes forming a fin on a substrate. A gate structure is formed over the fin. A recess is formed in the fin proximate the gate structure. A gradient doped region is formed in the fin with a p-type dopant. The gradient doped region extends from a bottom surface of the recess to a vertical depth below the recess in the fin. A source/drain region is formed in the recess and on the gradient doped regions.
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公开(公告)号:US20190304846A1
公开(公告)日:2019-10-03
申请号:US15937472
申请日:2018-03-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kun-Yu LEE , Huicheng CHANG , Che-Hao CHANG , Ching-Hwanq SU , Weng CHANG , Xiong-Fei YU
IPC: H01L21/8238 , H01L27/092
Abstract: Embodiments described herein relate to a method for patterning a doping layer, such as a lanthanum containing layer, used to dope a high-k dielectric layer in a gate stack of a FinFET device for threshold voltage tuning. A blocking layer may be formed between the doping layer and a hard mask layer used to pattern the doping layer. In an embodiment, the blocking layer may include or be aluminum oxide (AlOx). The blocking layer can prevent elements from the hard mask layer from diffusing into the doping layer, and thus, can improve reliability of the devices formed. The blocking layer can also improve a patterning process by reducing patterning induced defects.
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