公开(公告)号：US20190273145A1

公开(公告)日：2019-09-05

申请号：US15909815

申请日：2018-03-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hang CHIU ,  Chung-Chiang WU ,  Ching-Hwanq SU ,  Da-Yuan LEE ,  Ji-Cheng CHEN ,  Kuan-Ting LIU ,  Tai-Wei HWANG ,  Chung-Yi SU

IPC: H01L29/49 ,  H01L27/088 ,  H01L29/51 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3213

Abstract: Certain embodiments of a semiconductor device and a method of forming a semiconductor device comprise forming a high-k gate dielectric layer over a short channel semiconductor fin. A work function metal layer is formed over the high-k gate dielectric layer. A seamless metal fill layer is conformally formed over the work function metal layer.

公开(公告)号：US20200335597A1

公开(公告)日：2020-10-22

申请号：US16914638

申请日：2020-06-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Hsiu HUNG ,  Yi-Hsiang CHAO ,  Kuan-Yu YEH ,  Kan-Ju LIN ,  Chun-Wen NIEH ,  Huang-Yi HUANG ,  Chih-Wei CHANG ,  Ching-Hwanq SU

IPC: H01L29/45 ,  H01L21/768 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/3213 ,  H01L21/3205 ,  H01L21/321

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a fin structure formed over a semiconductor substrate and a gate structure formed over the fin structure. The semiconductor device structure also includes an isolation feature over a semiconductor substrate and below the gate structure. The semiconductor device structure further includes two spacer elements respectively formed over a first sidewall and a second sidewall of the gate structure. The first sidewall is opposite to the second sidewall and the two spacer elements have hydrophobic surfaces respectively facing the first sidewall and the second sidewall. The gate structure includes a gate dielectric layer and a gate electrode layer separating the gate dielectric layer from the hydrophobic surfaces of the two spacer elements.

公开(公告)号：US20190304846A1

公开(公告)日：2019-10-03

申请号：US15937472

申请日：2018-03-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kun-Yu LEE ,  Huicheng CHANG ,  Che-Hao CHANG ,  Ching-Hwanq SU ,  Weng CHANG ,  Xiong-Fei YU

IPC: H01L21/8238 ,  H01L27/092

Abstract: Embodiments described herein relate to a method for patterning a doping layer, such as a lanthanum containing layer, used to dope a high-k dielectric layer in a gate stack of a FinFET device for threshold voltage tuning. A blocking layer may be formed between the doping layer and a hard mask layer used to pattern the doping layer. In an embodiment, the blocking layer may include or be aluminum oxide (AlOx). The blocking layer can prevent elements from the hard mask layer from diffusing into the doping layer, and thus, can improve reliability of the devices formed. The blocking layer can also improve a patterning process by reducing patterning induced defects.

公开(公告)号：US20200020583A1

公开(公告)日：2020-01-16

申请号：US16034843

申请日：2018-07-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Hsiang CHAO ,  Min-Hsiu HUNG ,  Chun-Wen NIEH ,  Ya-Huei LI ,  Yu-Hsiang LIAO ,  Li-Wei CHU ,  Kan-Ju LIN ,  Kuan-Yu YEH ,  Chi-Hung CHUANG ,  Chih-Wei CHANG ,  Ching-Hwanq SU ,  Hung-Yi HUANG ,  Ming-Hsing TSAI

IPC: H01L21/768 ,  H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/45 ,  H01L23/535 ,  H01L29/66 ,  H01L21/285 ,  H01L21/265 ,  H01L21/324

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a fin structure over a semiconductor substrate and forming a gate stack over the fin structure. The method also includes forming an epitaxial structure over the fin structure, and the epitaxial structure is adjacent to the gate stack. The method further includes forming a dielectric layer over the epitaxial structure and forming an opening in the dielectric layer to expose the epitaxial structure. In addition, the method includes applying a metal-containing material on the epitaxial structure while the epitaxial structure is heated so that a portion of the epitaxial structure is transformed to form a metal-semiconductor compound region.

公开(公告)号：US20190097012A1

公开(公告)日：2019-03-28

申请号：US15964352

申请日：2018-04-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Hsiu HUNG ,  Yi-Hsiang CHAO ,  Kuan-Yu YEH ,  Kan-Ju LIN ,  Chun-Wen NIEH ,  Huang-Yi HUANG ,  Chih-Wei CHANG ,  Ching-Hwanq SU

IPC: H01L29/45 ,  H01L21/768 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/3213 ,  H01L21/3205

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate including a conductive region made of silicon, germanium or a combination thereof. The method also includes forming an insulating layer over the semiconductor substrate and forming an opening in the insulating layer to expose the conductive region. The method also includes performing a deposition process to form a metal layer over a sidewall and a bottom of the opening, so that a metal silicide or germanide layer is formed on the exposed conductive region by the deposition process. The method also includes performing a first in-situ etching process to etch at least a portion of the metal layer and forming a fill metal material layer in the opening.