公开(公告)号：US20190273145A1

公开(公告)日：2019-09-05

申请号：US15909815

申请日：2018-03-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hang CHIU ,  Chung-Chiang WU ,  Ching-Hwanq SU ,  Da-Yuan LEE ,  Ji-Cheng CHEN ,  Kuan-Ting LIU ,  Tai-Wei HWANG ,  Chung-Yi SU

IPC: H01L29/49 ,  H01L27/088 ,  H01L29/51 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3213

Abstract: Certain embodiments of a semiconductor device and a method of forming a semiconductor device comprise forming a high-k gate dielectric layer over a short channel semiconductor fin. A work function metal layer is formed over the high-k gate dielectric layer. A seamless metal fill layer is conformally formed over the work function metal layer.

公开(公告)号：US20180097085A1

公开(公告)日：2018-04-05

申请号：US15811374

申请日：2017-11-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Sheng WANG ,  Chi-Cheng HUNG ,  Da-Yuan LEE ,  Hsin-Yi LEE ,  Kuan-Ting LIU

IPC: H01L29/66 ,  H01L29/49

CPC classification number: H01L29/66545 ,  H01L29/4966 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A field effect transistor includes a channel layer made of a semiconductor and a metal gate structure. The metal gate structure includes a gate dielectric layer, a barrier layer formed on the gate dielectric layer, a work function adjustment layer formed on the barrier layer and made of one of Al and TiAl, a blocking layer formed on the work function adjustment layer and made of TiN, and a body metal layer formed on the blocking layer and made of W. A gate length over the channel layer is in a range from 5 nm to 15 nm, and a thickness of the first conductive layer is in a range of 0.2 nm to 3.0 nm. A range between a largest thickness and a smallest thickness of the first conductive layer is more than 0% and less than 10% of an average thickness of the first conductive layer.