公开(公告)号：US20200176567A1

公开(公告)日：2020-06-04

申请号：US16733761

申请日：2020-01-03

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Meng-Hsuan HSIAO ,  Winnie Victoria Wei-Ning CHEN ,  Tung Ying LEE

IPC: H01L29/10 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/165 ,  H01L27/092 ,  H01L29/786 ,  H01L29/66

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a substrate and a first fin and a second fin formed over the substrate. The semiconductor structure further includes a first anti-punch through region formed in the first fin and a second anti-punch through region formed in the second fin and first nanostructures formed over the first fin and second nanostructures formed over the second fin. The semiconductor structure further includes a barrier layer formed over the second anti-punch through region and a first gate formed around the first nanostructures. The semiconductor structure further includes a second gate formed around the second nanostructures. In addition, an interface between the barrier layer and the second anti-punch through region is higher than an interface between the first anti-punch through region and the first gate.

公开(公告)号：US20200321336A1

公开(公告)日：2020-10-08

申请号：US16910297

申请日：2020-06-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Winnie Victoria Wei-Ning CHEN ,  Meng-Hsuan HSIAO ,  Tung-Ying LEE ,  Pang-Yen TSAI ,  Yasutoshi OKUNO

IPC: H01L27/092 ,  H01L29/423 ,  H01L29/06 ,  H01L21/306 ,  H01L29/16 ,  H01L21/02 ,  H01L29/10 ,  H01L21/8238

Abstract: A method for forming a semiconductor device is provided. The method includes removing a first portion of a substrate to form a recess in the substrate. The method includes forming an epitaxy layer in the recess. The epitaxy layer and the substrate are made of different semiconductor materials. The method includes forming a stacked structure of a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over the substrate and the epitaxy layer. The method includes removing a second portion of the stacked structure and a third portion of the epitaxy layer to form trenches passing through the stacked structure and extending into the epitaxy layer, The stacked structure is divided into a first fin element and a second fin element by the trenches, and the first fin element and the second fin element are over the substrate and the epitaxy layer respectively.

公开(公告)号：US20230068065A1

公开(公告)日：2023-03-02

申请号：US17461271

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Co.,Ltd.

Inventor： Mrunal Abhijith KHADERBAD ,  Sathaiya Mahaveer DHANYAKUMAR ,  Huicheng CHANG ,  Keng-Chu LIN ,  Winnie Victoria Wei-Ning CHEN

IPC: H01L21/822 ,  H01L21/8234 ,  H01L27/092

Abstract: A semiconductor device includes a first transistor device of a first type. The first transistor includes first nanostructures, a first pair of source/drain structures, and a first gate electrode on the first nanostructures. The semiconductor device also includes a second transistor device of a second type formed over the first transistor device. The second transistor device includes second nanostructures over the first nanostructures, a second pair of source/drain structures over the first pair or source/drain structures, and a second gate electrode on the second nanostructures and over the first nanostructures. The semiconductor device also includes a first isolation structure between the first and second nanostructures. The semiconductor device further includes a second isolation structure in contact with a top surface of the first pair of source/drain structures. The semiconductor device also includes a seed layer between the second isolation structure and the second pair of source/drain structures.

公开(公告)号：US20190164965A1

公开(公告)日：2019-05-30

申请号：US15963920

申请日：2018-04-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Winnie Victoria Wei-Ning CHEN ,  Meng-Hsuan HSIAO ,  Tung-Ying LEE ,  Pang-Yen TSAI ,  Yasutoshi OKUNO

IPC: H01L27/092 ,  H01L29/423 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L21/02 ,  H01L21/306

Abstract: A semiconductor device comprises a substrate having an N-type field effect transistor (NFET) region and a P-type field effect transistor (PFET) region, a plurality of first nanowires in the PFET region and arranged in a first direction substantially perpendicular to the substrate and a plurality of second nanowires in the NFET region and arranged in the first direction. A composition of the first nanowires is different from a composition of the second nanowires, and one of the first nanowires is substantially aligned with one of the second nanowires in a second direction substantially perpendicular to the first direction.