公开(公告)号：US20140124899A1

公开(公告)日：2014-05-08

申请号：US13667458

申请日：2012-11-02

Applicant: RAYTHEON COMPANY

Inventor： Roland Gooch ,  Buu Diep ,  Thomas Allan Kocian ,  Stephen H. Black ,  Adam M. Kennedy

IPC: H01L23/48 ,  H01L23/544 ,  H01L21/56

CPC classification number: B81B7/0041 ,  B81B7/007 ,  B81C1/00269 ,  B81C2203/019 ,  H01L23/053 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/27444 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/291 ,  H01L2224/83001 ,  H01L2224/83007 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83141 ,  H01L2224/83192 ,  H01L2924/1461 ,  H01L2924/163 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer.

公开(公告)号：US08394679B2

公开(公告)日：2013-03-12

申请号：US12874212

申请日：2010-09-01

Applicant: Mark F Eaton ,  Curtis Nathan Potter ,  Andrew Miner

Inventor： Mark F Eaton ,  Curtis Nathan Potter ,  Andrew Miner

IPC: H01L21/00

CPC classification number: H01L21/50 ,  B81C1/00269 ,  H01L23/055 ,  H01L23/10 ,  H01L24/48 ,  H01L24/85 ,  H01L24/95 ,  H01L24/97 ,  H01L2224/292 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/4823 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/163 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A structure and method for cold weld compression bonding using a metallic nano-structured gasket is provided. This structure and method allows a hermetic package to be formed at lower pressures and temperatures than are possible using bulk or conventional thin-film gasket materials.

Abstract translation: 提供了一种使用金属纳米结构的垫圈进行冷焊压接的结构和方法。 这种结构和方法允许在比使用本体或常规薄膜垫圈材料可能的较低压力和温度下形成密封包装。

公开(公告)号：US20120007229A1

公开(公告)日：2012-01-12

申请号：US12832732

申请日：2010-07-08

Applicant: Gerald K. Bartley ,  David R. Motschman ,  Kamal K. Sikka ,  Jamil A. Wakil ,  Xiaojin Wei ,  Jiantao Zheng

Inventor： Gerald K. Bartley ,  David R. Motschman ,  Kamal K. Sikka ,  Jamil A. Wakil ,  Xiaojin Wei ,  Jiantao Zheng

IPC: H01L23/34 ,  H01L21/50

CPC classification number: H01L23/49827 ,  H01L23/055 ,  H01L23/14 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/42 ,  H01L23/433 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/3003 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/3303 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/16195 ,  H01L2924/163 ,  H01L2924/167 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A die stack package is provided and includes a substrate, a stack of computing components, at least one thermal plate, which is thermally communicative with the stack and a lid supported on the substrate to surround the stack and the at least one thermal plate to thereby define a first heat transfer path extending from one of the computing components to the lid via the at least one thermal plate and a fin coupled to a surface of the lid and the at least one thermal plate, and a second heat transfer path extending from the one of the computing components to the lid surface without passing through the at least one thermal plate.

Abstract translation: 提供了一个管芯堆叠封装，包括一个基板，一堆计算部件，至少一个与该堆叠热交换的热板，以及一个支撑在基板上的盖子，以围绕堆叠和至少一个热板，从而 限定从所述计算部件之一经由所述至少一个热板和联接到所述盖的表面和所述至少一个热板的翅片延伸到所述盖的第一热传递路径，以及从所述至少一个热板延伸的第二传热路径 计算组件之一到盖表面而不通过至少一个热板。

公开(公告)号：US20110272796A1

公开(公告)日：2011-11-10

申请号：US12874212

申请日：2010-09-01

Applicant: Mark F. Eaton ,  Curtis Nathan Potter ,  Andrew Miner

Inventor： Mark F. Eaton ,  Curtis Nathan Potter ,  Andrew Miner

IPC: H01L23/02 ,  H01L21/50

CPC classification number: H01L21/50 ,  B81C1/00269 ,  H01L23/055 ,  H01L23/10 ,  H01L24/48 ,  H01L24/85 ,  H01L24/95 ,  H01L24/97 ,  H01L2224/292 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/4823 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/163 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A structure and method for cold weld compression bonding using a metallic nano-structured gasket is provided. This structure and method allows a hermetic package to be formed at lower pressures and temperatures than are possible using bulk or conventional thin-film gasket materials.

Abstract translation: 提供了一种使用金属纳米结构的垫圈进行冷焊压接的结构和方法。 这种结构和方法允许在比使用本体或常规薄膜垫圈材料可能的较低压力和温度下形成密封包装。

公开(公告)号：US07300822B2

公开(公告)日：2007-11-27

申请号：US11118630

申请日：2005-04-28

Applicant: Yuan Li

Inventor： Yuan Li

IPC: H01L21/00

CPC classification number: H01L23/04 ,  H01L23/3675 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/163 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A semiconductor package includes a chip carrier to receive a semiconductor with a dimension generally greater than 22 mm. The chip carrier has a first coefficient of thermal expansion that is larger than the coefficient of thermal expansion of the semiconductor. A heat spreader having parallel channels on opposite sides is attached to the chip carrier along the channels. The heat spreader has a second coefficient of thermal expansion that is smaller than or equal to the coefficient of thermal expansion of the chip carrier. The interplay between the heat spreader and the chip carrier can effectively reduce package warpage and maintain coplanarity within the specification.

Abstract translation: 半导体封装包括用于接收尺寸通常大于22mm的半导体的芯片载体。 芯片载体具有比半导体的热膨胀系数大的第一热膨胀系数。 在相对侧上具有平行通道的散热器沿着通道连接到芯片载体。 散热器具有小于或等于芯片载体的热膨胀系数的第二热膨胀系数。 散热器和芯片载体之间的相互作用可有效降低封装翘曲并保持规格内的共面性。

公开(公告)号：US07217997B2

公开(公告)日：2007-05-15

申请号：US10565044

申请日：2004-07-30

Applicant: Chris Wyland

Inventor： Chris Wyland

IPC: H01L23/34

CPC classification number: H01L24/73 ,  H01L23/04 ,  H01L23/3672 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/91 ,  H01L2223/6611 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73221 ,  H01L2224/73229 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1616 ,  H01L2924/1617 ,  H01L2924/163 ,  H01L2924/166 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A structure provides for the control of bond wire impedance. In an example embodiment, there is an integrated circuit device comprising a semiconductor device die having a plurality of grounding pads, signal pads, and power pads and a package for mounting the integrated circuit and includes a conductive path having at least one reference trace that surrounds the integrated circuit. A grounding arch is disposed over the semiconductor device die.

Abstract translation: 一种结构提供了对键合线阻抗的控制。 在示例性实施例中，存在集成电路器件，其包括具有多个接地焊盘，信号焊盘和电源焊盘的半导体器件管芯和用于安装集成电路的封装，并且包括具有至少一个参考迹线的导电路径， 集成电路。 接地拱架设置在半导体器件裸片上。

公开(公告)号：US20050255635A1

公开(公告)日：2005-11-17

申请号：US10846722

申请日：2004-05-13

Applicant: Robert Starkston

Inventor： Robert Starkston

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/04 ,  H01L23/34 ,  H01L23/367 ,  H01L23/373 ,  H01L23/485

CPC classification number: H01L24/10 ,  H01L23/04 ,  H01L23/3675 ,  H01L23/3735 ,  H01L24/13 ,  H01L24/32 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/73253 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/1616 ,  H01L2924/163 ,  H01L2924/166 ,  H01L2924/19041 ,  H01L2924/00

Abstract: A thermally conductive member is placed adjacent a microelectronic die with a thermal interface material between the microelectronic die and a wetting layer formed on a surface of the thermally conductive member. The thermal interface material is heated to cause reflow thereof. The first portion of the thermal interface material is directed by the wetting layer into a first cavity formed in the thermally conductive member. The thermal interface material is then allowed to cool and solidify.

Abstract translation: 将导热构件放置在微电子管芯附近，在微电子管芯和形成在导热构件的表面上的润湿层之间具有热界面材料。 热界面材料被加热以引起其回流。 热界面材料的第一部分由润湿层引导到形成在导热构件中的第一空腔中。 然后将热界面材料冷却并固化。

公开(公告)号：US20050250252A1

公开(公告)日：2005-11-10

申请号：US11118630

申请日：2005-04-28

Applicant: Yuan Li

Inventor： Yuan Li

IPC: H01L23/04 ,  H01L23/367 ,  H01L21/50

CPC classification number: H01L23/04 ,  H01L23/3675 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/163 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A semiconductor package includes a chip carrier to receive a semiconductor with a dimension generally greater than 22 mm. The chip carrier has a first coefficient of thermal expansion that is larger than the coefficient of thermal expansion of the semiconductor. A heat spreader having parallel channels on opposite sides is attached to the chip carrier along the channels. The heat spreader has a second coefficient of thermal expansion that is smaller than or equal to the coefficient of thermal expansion of the chip carrier. The interplay between the heat spreader and the chip carrier can effectively reduce package warpage and maintain coplanarity within the specification.

公开(公告)号：US20050056926A1

公开(公告)日：2005-03-17

申请号：US10851288

申请日：2004-05-21

Applicant: Chin-Te Chen ,  Chang-Fu Lin

Inventor： Chin-Te Chen ,  Chang-Fu Lin

IPC: H01L23/10 ,  H01L23/36 ,  H01L23/495

CPC classification number: H01L23/10 ,  H01L23/36 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/16315 ,  H01L2924/00

Abstract: A heat dissipating structure and a semiconductor package with the same are proposed. A substrate is used to accommodate at least one chip thereon, and the chip is electrically connected to the substrate. A heat dissipating structure having a flat portion and a support portion is mount on the substrate via the support portion by means of an adhesive. At least one groove is formed on the support portion and at least one air vent is formed around the groove to allow the groove to communicate with the outside via the air vent, such that the adhesive is allowed to fill the groove to expel air from the groove to the atmosphere through the air vent, thereby preventing the air from trapped in the groove.

Abstract translation: 提出了一种散热结构及其半导体封装。 衬底用于容纳至少一个芯片，芯片电连接至衬底。 具有平坦部分和支撑部分的散热结构通过粘合剂经由支撑部分安装在基板上。 在支撑部分上形成至少一个凹槽，并且围绕凹槽形成至少一个排气孔，以允许凹槽经由排气口与外部连通，使得允许粘合剂填充凹槽以从空气中排出空气 通过排气口到大气中，从而防止空气被捕获在槽中。

公开(公告)号：US20050023661A1

公开(公告)日：2005-02-03

申请号：US10926102

申请日：2004-08-26

Applicant: Shigeji Matsubara ,  Masaharu Yamamoto ,  Toshiaki Fukusako ,  Yoshito Tagashira

Inventor： Shigeji Matsubara ,  Masaharu Yamamoto ,  Toshiaki Fukusako ,  Yoshito Tagashira

IPC: H01L21/50 ,  H01L23/04 ,  H01L23/053 ,  H01L23/10 ,  H01L23/02

CPC classification number: H01L21/50 ,  H01L23/04 ,  H01L23/053 ,  H01L23/10 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16152 ,  H01L2924/1617 ,  H01L2924/16195 ,  H01L2924/163 ,  Y10S257/924

Abstract: A hermetic sealing cap member capable of suppressing deterioration of characteristics of an electronic component resulting from a sealant such as solder coming into contact with the electronic component in a package is obtained. This hermetic sealing cap, which is a hermetic sealing cap employed for an electronic component storing package for storing an electronic component (5, 34), comprises a hermetic sealing cap member (11, 41), a first plating layer (12, 42) formed at least on a region other than a region of the hermetic sealing cap member formed with a sealant (3, 32) and a second plating layer (13, 43), formed on the region of the hermetic sealing cap member on which the sealant is arranged, containing a material superior in wettability with the sealant to the first plating layer.

Abstract translation: 获得能够抑制由包装中的与电子部件接触的焊料等密封剂导致的电子部件的特性劣化的气密密封盖部件。 作为用于存储电子部件（5,34）的电子部件存放包装的气密密封盖的气密密封盖包括气密密封盖部件（11,41），第一镀层（12,42） 至少形成在形成有密封剂（3,32）和第二镀层（13,43）的气密密封帽构件的区域以外的区域上，所述密封剂构件形成在密封盖构件的区域上，密封剂 被布置成含有与密封剂相比在第一镀层上润湿性优异的材料。