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    DETERMINING THERMAL INTERFACE MATERIAL (TIM) THICKNESS CHANGE
    3.
    发明申请
    DETERMINING THERMAL INTERFACE MATERIAL (TIM) THICKNESS CHANGE 失效
    确定热界面材料（TIM）厚度变化

    公开(公告)号：US20130027063A1

    公开(公告)日：2013-01-31

    申请号：US13191729

    申请日：2011-07-27

    申请人： PAUL F. BODENWEBER ,  Virendra R. Jadhav ,  Kamal K. Sikka ,  Jiantao Zheng ,  Jeffrey A. Zitz

    发明人： PAUL F. BODENWEBER ,  Virendra R. Jadhav ,  Kamal K. Sikka ,  Jiantao Zheng ,  Jeffrey A. Zitz

    IPC分类号： G01R27/26

    CPC分类号： G01B7/08 ,  G01N27/22 ,  H01L22/12

    摘要： An apparatus for determining a thickness change of thermal interface material (TIM) disposed between first and second elements is provided. The apparatus includes a first part movable with the first element in a movement direction along which the TIM thickness is to be determined, a second part movable with the second element in the movement direction and a sensor to measure a distance between the first and second parts in the movement direction, the measured distance being related to the TIM thickness change.

    摘要翻译： 提供一种用于确定设置在第一和第二元件之间的热界面材料（TIM）的厚度变化的装置。 该装置包括：第一部件，沿第一部件可沿着移动方向移动，TIM移动方向上沿着移动方向确定TIM厚度;第二部件，其沿着移动方向与第二部件移动;以及传感器，用于测量第一部件和第二部件之间的距离 在移动方向上，测量的距离与TIM厚度变化有关。

    Semiconductor device assembly having a stress-relieving buffer layer
    5.
    发明授权
    Semiconductor device assembly having a stress-relieving buffer layer 有权
    具有应力消除缓冲层的半导体器件组件

    公开(公告)号：US07875972B2

    公开(公告)日：2011-01-25

    申请号：US12491517

    申请日：2009-06-25

    申请人： Virendra R. Jadhav ,  Kamal K. Sikka ,  Jiantao Zheng

    发明人： Virendra R. Jadhav ,  Kamal K. Sikka ,  Jiantao Zheng

    IPC分类号： H01L23/34

    CPC分类号： H01L23/3735 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83951

    摘要： Disclosed is a multilayer thermal interface material which includes a first layer of metallic thermal interface material, a buffer layer and preferably a second layer of thermal interface material which may be metallic or nonmetallic. The multilayer thermal interface material is used in conjunction with a semiconductor device assembly of a chip carrier substrate, a heat spreader for attaching to the substrate, a semiconductor device mounted on the substrate and underneath the heat spreader and the multilayer thermal interface material interposed between the heat spreader and the semiconductor device. The heat spreader has a first coefficient of thermal expansion (CTE), CTE1, the buffer layer has a second CTE, CTE2, and the semiconductor device has a third CTE, CTE3, wherein CTE1>CTE2>CTE3.

    摘要翻译： 公开了一种多层热界面材料，其包括金属热界面材料的第一层，缓冲层，优选为第二层热界面材料，其可以是金属或非金属的。 多层热界面材料与芯片载体衬底的半导体器件组件，用于附接到衬底的散热器，安装在衬底上的散热器和放置在散热器下方的多层热界面材料结合使用 散热器和半导体器件。 散热器具有第一热膨胀系数（CTE），CTE1，缓冲层具有第二CTE，CTE2，半导体器件具有第三个CTE CTE3，其中CTE1> CTE2> CTE3。

    ELECTRONIC PACKAGE METHOD AND STRUCTURE WITH CURE-MELT HIERARCHY
    6.
    发明申请
    ELECTRONIC PACKAGE METHOD AND STRUCTURE WITH CURE-MELT HIERARCHY 有权
    电子包装方法和结构与固化层状分析

    公开(公告)号：US20090179322A1

    公开(公告)日：2009-07-16

    申请号：US11954943

    申请日：2007-12-12

    申请人： BRUCE K FURMAN ,  Kenneth C Marston ,  Jiantao Zheng ,  Jeffrey A Zitz

    发明人： BRUCE K FURMAN ,  Kenneth C Marston ,  Jiantao Zheng ,  Jeffrey A Zitz

    IPC分类号： H01L23/34 ,  H01L21/52

    CPC分类号： H01L23/3737 ,  H01L23/04 ,  H01L23/10 ,  H01L23/3733 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01079 ,  H01L2924/16251 ,  H01L2924/3511

    摘要： Disclosed herein are embodiments of electronic package incorporating a thermal interface material (e.g., a metal TIM) that is positioned between a lid and a chip on a substrate. The TIM has a predetermined (i.e., repeatable) minimum thickness and is further registered to the top surface of the chip (i.e., the TIM has an essentially symmetric shape and does not extend vertically along the sidewalls of the chip). Also, disclosed herein are embodiments of a method of forming such an electronic package that uses a hierarchical heating process that cures a lid sealant, thereby securing the lid to the substrate, and then reflows (i.e., melts and cools) the TIM, thereby adhering the TIM to both the chip and lid. This hierarchical heating process ensures that the TIM has the above-mentioned characteristics (i.e., a predetermined minimum thickness and registration to the top surface of the chip) and further provides robust process windows for high-yield, low-cost electronic package manufacturing.

    摘要翻译： 本文公开了包含位于盖和基板上的芯片之间的热界面材料（例如，金属TIM）的电子封装的实施例。 TIM具有预定的（即可重复的）最小厚度，并进一步与芯片的顶表面对准（即，TIM具有基本上对称的形状，并且不沿芯片的侧壁垂直延伸）。 此外，本文公开了形成这样的电子封装的方法的实施例，其使用固化盖密封剂的分层加热工艺，从而将盖固定到基板上，然后使TIM的回流（即，熔化和冷却），从而粘附 TIM到芯片和盖子。 这种分层加热工艺确保TIM具有上述特性（即，预定的最小厚度并且与芯片的顶表面对准），并且进一步提供用于高产量，低成本电子封装制造的稳健的工艺窗口。

    Method for shaping a laminate substrate
    7.
    发明授权
    Method for shaping a laminate substrate 有权
    层压基板成型方法

    公开(公告)号：US09048245B2

    公开(公告)日：2015-06-02

    申请号：US13488678

    申请日：2012-06-05

    申请人： Edmund Blackshear ,  Thomas E. Lombardi ,  Donald A. Merte ,  Steven P. Ostrander ,  Thomas Weiss ,  Jiantao Zheng

    发明人： Edmund Blackshear ,  Thomas E. Lombardi ,  Donald A. Merte ,  Steven P. Ostrander ,  Thomas Weiss ,  Jiantao Zheng

    IPC分类号： B23K31/00 ,  B23K31/02 ,  B23K1/00 ,  B23K1/008 ,  B23K1/19 ,  B23K37/00 ,  B23K37/04 ,  H01L23/00 ,  H01L21/673

    CPC分类号： H01L23/562 ,  H01L21/67333 ,  H01L22/12 ,  H01L22/20 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/81024 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/81908 ,  H01L2924/3511 ,  Y02P80/30

    摘要： A method including providing a fixture comprising a trap ring, a base plate having a recess adapted to receive a laminate substrate, the base plate including an opening and an adjustable height center button disposed in the opening, the opening being located within the recess and located in a center of the laminate substrate, characterizing the laminate substrate for warpage characteristics by using one of room temperature techniques and elevated temperature techniques, determining a horizontal plane distortion based on the warpage characteristics, and placing the laminate substrate into the fixture with an adjustment to correct the horizontal plane distortion, the adjustment is provided by the adjustable height center button, wherein the adjustable height center button contacts the laminate substrate. The method further includes fluxing the laminate substrate, placing a chip onto the laminate substrate, and placing the fixture into a reflow furnace to join the chip and the laminate substrate.

    摘要翻译： 一种方法，包括提供包括陷阱环的固定装置，具有适于接收层压基板的凹部的基板，所述基板包括设置在所述开口中的开口和可调节的高度中心按钮，所述开口位于所述凹部内并且位于 在层压基板的中心，通过使用室温技术和高温技术中的一种来表征层压基板的翘曲特性，基于翘曲特性确定水平面变形，并将层压基板放置到固定装置中， 校正水平面失真，调节由可调高度中心按钮提供，其中可调节的高度中心按钮接触层压基板。 该方法还包括使层压基板熔化，将芯片放置在层压基板上，并将固定装置放入回流炉中以连接芯片和层叠基板。