公开(公告)号：US5935404A

公开(公告)日：1999-08-10

申请号：US787071

申请日：1997-01-22

申请人： Shaji Farooq ,  Suryanarayana Kaja ,  Hsichang Liu ,  Karen P. McLaughlin ,  Gregg B. Monjeau ,  Kim Hulett Ruffing

发明人： Shaji Farooq ,  Suryanarayana Kaja ,  Hsichang Liu ,  Karen P. McLaughlin ,  Gregg B. Monjeau ,  Kim Hulett Ruffing

IPC分类号： H01L21/48 ,  C25D5/02

CPC分类号： H01L21/4885

摘要： A method of performing electrochemistry processes on features and connectors of a substrate includes the application of a shorting layer across the connectors which are in electrical contact with the features, thereby shorting the features and creating an assemblage for which electricity is applied.

摘要翻译： 在衬底的特征和连接器上执行电化学处理的方法包括在与特征电接触的连接器上施加短路层，从而短路特征并产生施加电力的组合。

公开(公告)号：US08232636B2

公开(公告)日：2012-07-31

申请号：US12693646

申请日：2010-01-26

申请人： James N Humenik ,  Sushumna Iruvanti ,  Richard Langlois ,  Hsichang Liu ,  Govindarajan Natarajan ,  Kamal K Sikka ,  Hilton T Toy ,  Jiantao Zheng ,  Gregg B Monjeau ,  Mark Kapfhammer

发明人： James N Humenik ,  Sushumna Iruvanti ,  Richard Langlois ,  Hsichang Liu ,  Govindarajan Natarajan ,  Kamal K Sikka ,  Hilton T Toy ,  Jiantao Zheng ,  Gregg B Monjeau ,  Mark Kapfhammer

IPC分类号： H01L23/10 ,  H01L23/34

CPC分类号： H01L23/42 ,  H01L23/10 ,  H01L23/3675 ,  H01L23/3736 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

摘要： A frontside of a chip is bonded to a top surface of a chip carrier. Seal material is dispensed at a periphery of the top surface of the chip carrier. A solder TIM having a first side and a second side is provided. The first side of the TIM contacts a backside of the chip. A reflow is performed to melt the TIM. The second side of the TIM is bonded to a lid. The seal material is cured. The lid is attached to the top surface of the chip carrier. Backfill material is injected into a space between the top surface of the chip carrier and the lid. The backfill material abuts sides of the TIM. The backfill material is cured. TIM solder cracking and associated thermal degradation are mitigated.

摘要翻译： 芯片的前端结合到芯片载体的顶表面。 密封材料被分配在芯片载体的顶表面的周边。 提供具有第一侧和第二侧的焊料TIM。 TIM的第一面接触芯片的背面。 进行回流以融化TIM。 TIM的第二面粘合到盖子上。 密封材料固化。 盖子附接到芯片载体的顶表面。 回填材料被注入到芯片载体的顶表面和盖子之间的空间中。 回填材料邻接TIM的两侧。 回填材料固化。 TIM焊料裂纹和相关的热降解得到缓解。

公开(公告)号：US08188597B2

公开(公告)日：2012-05-29

申请号：US12887809

申请日：2010-09-22

申请人： Thomas E. Lombardi ,  Donald Merte ,  Gregg B. Monjeau ,  David L. Questad ,  Son K. Tran

发明人： Thomas E. Lombardi ,  Donald Merte ,  Gregg B. Monjeau ,  David L. Questad ,  Son K. Tran

IPC分类号： H01L23/34

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K3/087 ,  B23K2101/40 ,  H01L21/4846 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/49894 ,  H01L24/01 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  Y10T29/41 ,  Y10T29/49117 ,  H01L2924/00

摘要： A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions.

摘要翻译： 提供了一种形成芯片组件的固定装置和方法。 夹具组件包括具有开口尺寸以容纳安装在层压板上的芯片的第一板。 固定装置还包括通过至少一个机械紧固机构配合到第一板的第二板。 夹具组件还包括由第一板和第二板的相对表面限定的并由第一板和第二板中的至少一个的凸起台阶部限定的空间。 这个空间与开幕式一致。 该空间的尺寸和形状使得层压体被限制在空间内并且直接邻接第一板和第二板的阶梯部分和相对表面以被限制在X，Y和Z方向上。

公开(公告)号：US06682872B2

公开(公告)日：2004-01-27

申请号：US10056245

申请日：2002-01-22

申请人： Krishna G. Sachdev ,  Michael Berger ,  Rebecca Y. Gorrell ,  Gregg B. Monjeau ,  Bernadette H. Perry ,  Thomas A. Wassick

发明人： Krishna G. Sachdev ,  Michael Berger ,  Rebecca Y. Gorrell ,  Gregg B. Monjeau ,  Bernadette H. Perry ,  Thomas A. Wassick

IPC分类号： G03C500

CPC分类号： C08F290/048 ,  C08L13/00 ,  G03F7/033 ,  G03F7/038 ,  H05K3/287 ,  Y10S430/106 ,  Y10S430/114 ,  Y10T428/31583 ,  Y10T428/31587 ,  Y10T428/31935

摘要： Radiation-curable compositions are provided for use in the fabrication of electronic components as passivation coatings; for defect repair in ceramic and thin film products by micropassivation in high circuit density electronic modules to allow product recovery; as a solder mask in electronic assembly processes; for use as protective coatings on printed circuit board (PCB) circuitry and electronic devices against mechanical damage and corrosion from exposure to the environment. The compositions are solvent-free, radiation-curable, preferably uv-curable, containing a polymer binder, which is a pre-formed thermoplastic or elastomeric polymer/oligomer, a monofunctional and/or bifunctional acrylic monomer, a multifunctional (more than 2 reactive groups) acrylated/methacrylated monomer, and a photoinitiator, where all the constituents are mutually miscible forming a homogeneous viscous blend without the addition of an organic solvent. The compositions may also contain inorganic fillers and/or nanoparticle fillers.

摘要翻译： 提供可辐射固化的组合物用于制造电子部件作为钝化涂层; 通过在高电路密度电子模块中的微激活来对陶瓷和薄膜产品进行缺陷修复，以允许产品回收; 作为电子组装工艺中的焊接掩模; 用作印刷电路板（PCB）电路和电子设备上的保护涂层，防止暴露于环境中的机械损伤和腐蚀。 该组合物是无溶剂的，可辐射固化的，优选可紫外固化的，其包含聚合物粘合剂，其为预成型的热塑性或弹性体聚合物/低聚物，单官能和/或双官能丙烯酸单体，多官能（多于2个反应性 基团）丙烯酸酯化/甲基丙烯酸酯化的单体和光引发剂，其中所有组分是相互混溶的，而不加入有机溶剂形成均匀的粘稠共混物。 组合物还可以含有无机填料和/或纳米颗粒填料。

公开(公告)号：US5219520A

公开(公告)日：1993-06-15

申请号：US913567

申请日：1992-07-14

申请人： Peter J. Brofman ,  Shaji Farooq ,  Kathleen A. Lidestri ,  Gregg B. Monjeau ,  Karl J. Puttlitz

发明人： Peter J. Brofman ,  Shaji Farooq ,  Kathleen A. Lidestri ,  Gregg B. Monjeau ,  Karl J. Puttlitz

IPC分类号： B22F3/11 ,  B23K3/08

CPC分类号： B22F3/11 ,  B23K3/08 ,  B22F2998/00 ,  B22F2999/00

摘要： A porous metal block for selectively removing solder or braze from a substrate is disclosed. The block comprises a plurality of protrusions which absorb solder or braze through capillary action. The number and dimensions of the protrusions vary depending on the application. Also disclosed is a process for making such a block involving a unique two steps sintering process.

摘要翻译： 公开了一种用于从衬底选择性地去除焊料或钎焊的多孔金属块。 该块包括通过毛细管作用吸收焊料或钎焊的多个突起。 突起的数量和尺寸根据应用而变化。 还公开了制造这种涉及独特的两步烧结工艺的块的方法。

公开(公告)号：US20120187180A1

公开(公告)日：2012-07-26

申请号：US13422429

申请日：2012-03-16

申请人： Thomas E. LOMBARDI ,  Donald MERTE ,  Gregg B. MONJEAU ,  David L. QUESTAD ,  Son K. TRAN

发明人： Thomas E. LOMBARDI ,  Donald MERTE ,  Gregg B. MONJEAU ,  David L. QUESTAD ,  Son K. TRAN

IPC分类号： B23K31/02 ,  H01L21/58

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K3/087 ,  B23K2101/40 ,  H01L21/4846 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/49894 ,  H01L24/01 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  Y10T29/41 ,  Y10T29/49117 ,  H01L2924/00

摘要： A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions.

公开(公告)号：US20120070940A1

公开(公告)日：2012-03-22

申请号：US12887809

申请日：2010-09-22

申请人： Thomas E. Lombardi ,  Donald Merte ,  Gregg B. Monjeau ,  David L. Questad ,  Son K. Tran

发明人： Thomas E. Lombardi ,  Donald Merte ,  Gregg B. Monjeau ,  David L. Questad ,  Son K. Tran

IPC分类号： H01L21/50 ,  B23K37/04

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K3/087 ,  B23K2101/40 ,  H01L21/4846 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/49894 ,  H01L24/01 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  Y10T29/41 ,  Y10T29/49117 ,  H01L2924/00

摘要： A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions.

摘要翻译： 提供了一种形成芯片组件的固定装置和方法。 夹具组件包括具有开口尺寸以容纳安装在层压板上的芯片的第一板。 固定装置还包括通过至少一个机械紧固机构配合到第一板的第二板。 夹具组件还包括由第一板和第二板的相对表面限定的并由第一板和第二板中的至少一个的凸起台阶部限定的空间。 这个空间与开幕式一致。 该空间的尺寸和形状使得层压体被限制在空间内并且直接邻接第一板和第二板的阶梯部分和相对表面以被限制在X，Y和Z方向上。

公开(公告)号：US08759151B2

公开(公告)日：2014-06-24

申请号：US13422429

申请日：2012-03-16

申请人： Thomas E. Lombardi ,  Donald Merte ,  Gregg B. Monjeau ,  David L. Questad ,  Son K. Tran

发明人： Thomas E. Lombardi ,  Donald Merte ,  Gregg B. Monjeau ,  David L. Questad ,  Son K. Tran

IPC分类号： H01L21/00

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K3/087 ,  B23K2101/40 ,  H01L21/4846 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/49894 ,  H01L24/01 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  Y10T29/41 ,  Y10T29/49117 ,  H01L2924/00

摘要： A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions.

摘要翻译： 提供了一种形成芯片组件的固定装置和方法。 夹具组件包括具有开口尺寸以容纳安装在层压板上的芯片的第一板。 固定装置还包括通过至少一个机械紧固机构配合到第一板的第二板。 夹具组件还包括由第一板和第二板的相对表面限定的并由第一板和第二板中的至少一个的凸起台阶部限定的空间。 这个空间与开幕式一致。 该空间的尺寸和形状使得层压体被限制在空间内并且直接邻接第一板和第二板的阶梯部分和相对表面以被限制在X，Y和Z方向上。

公开(公告)号：US20110180923A1

公开(公告)日：2011-07-28

申请号：US12693646

申请日：2010-01-26

申请人： JAMES N. HUMENIK ,  SUSHUMNA IRUVANTI ,  RICHARD LANGLOIS ,  HSICHANG LIU ,  GOVINDARAJAN NATARAJAN ,  KAMAL K. SIKKA ,  HILTON T. TOY ,  JIANTAO ZHENG ,  GREGG B. MONJEAU ,  MARK KAPFHAMMER

发明人： JAMES N. HUMENIK ,  SUSHUMNA IRUVANTI ,  RICHARD LANGLOIS ,  HSICHANG LIU ,  GOVINDARAJAN NATARAJAN ,  KAMAL K. SIKKA ,  HILTON T. TOY ,  JIANTAO ZHENG ,  GREGG B. MONJEAU ,  MARK KAPFHAMMER

IPC分类号： H01L23/02 ,  H01L21/58

CPC分类号： H01L23/42 ,  H01L23/10 ,  H01L23/3675 ,  H01L23/3736 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

摘要： A frontside of a chip is bonded to a top surface of a chip carrier. Seal material is dispensed at a periphery of the top surface of the chip carrier. A solder TIM having a first side and a second side is provided. The first side of the TIM contacts a backside of the chip. A reflow is performed to melt the TIM. The second side of the TIM is bonded to a lid. The seal material is cured. The lid is attached to the top surface of the chip carrier. Backfill material is injected into a space between the top surface of the chip carrier and the lid. The backfill material abuts sides of the TIM. The backfill material is cured. TIM solder cracking and associated thermal degradation are mitigated.

摘要翻译： 芯片的前端结合到芯片载体的顶表面。 密封材料被分配在芯片载体的顶表面的周边。 提供具有第一侧和第二侧的焊料TIM。 TIM的第一面接触芯片的背面。 进行回流以融化TIM。 TIM的第二面粘合到盖子上。 密封材料固化。 盖子附接到芯片载体的顶表面。 回填材料被注入到芯片载体的顶表面和盖子之间的空间中。 回填材料邻接TIM的两侧。 回填材料固化。 TIM焊料裂纹和相关的热降解得到缓解。

公开(公告)号：US5985128A

公开(公告)日：1999-11-16

申请号：US305433

申请日：1999-05-05

申请人： Shaji Farooq ,  Suryanarayana Kaja ,  Hsichang Liu ,  Karen P. McLaughlin ,  Gregg B. Monjeau ,  Kim Hulett Ruffing

发明人： Shaji Farooq ,  Suryanarayana Kaja ,  Hsichang Liu ,  Karen P. McLaughlin ,  Gregg B. Monjeau ,  Kim Hulett Ruffing

IPC分类号： H01L21/48 ,  C25F3/14

CPC分类号： H01L21/4885

摘要： A method for preforming electrochemical processes requiring the application of electricity on features of a substrate includes shorting out the features using a shorting layer across connectors to which the features a in electrical communication. Electricity is then applied and the process is performed.

摘要翻译： 用于预处理需要在衬底的特征上施加电力的电化学方法的方法包括使用电气通信中的特征的连接器上的短路层来简化特征。 然后施加电力并执行该过程。