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公开(公告)号：US10210817B2
公开(公告)日：2019-02-19
申请号：US15528888
申请日：2016-11-14
Inventor： Liang Zhang , Shuo Li , Zhipeng Feng , Jianguang Yang , Dan Su , Zongze He , Jieqiong Wang
Abstract: The present application discloses a circuit for driving a light emitting diode light source assembly having a plurality of light emitting diode groups, each group having at least one light emitting diode. The circuit includes a processor configured to determine a set brightness level, calculate a number of light emitting diode groups required to be on to achieve the set brightness level, and select the number of light emitting diode groups to be turned on at allocated positions in the light emitting diode light source assembly; and a driving sub-circuit configured to turn on the number of light emitting diode groups at the allocated positions. The number of light emitting diode groups is a positive integer N, N is less than a total number of the plurality of light emitting diode groups.
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公开(公告)号：US10019928B2
公开(公告)日：2018-07-10
申请号：US15536087
申请日：2016-08-11
Inventor： Zongze He , Jieqiong Wang , Dan Su , Shuo Li , Jianguang Yang , Zhipeng Feng , Liang Zhang
IPC: G09G3/20
CPC classification number: G09G3/2003 , G09G3/2088 , G09G2320/0242 , G09G2320/0276 , G09G2320/0285 , G09G2320/0693
Abstract: The present disclosure provides a method for obtaining a mura compensation value, a device for obtaining a mura compensation value and a display panel. The method includes: obtaining an image of a detection picture displayed on a display panel, extracting display data matrices of three primary colors, obtaining first correction matrices of the three primary colors, obtaining position coordinates of extreme points of the first correction matrices of the three primary colors, obtaining second correction matrices and a third correction matrix group of the three primary colors, obtaining compensation matrices from the third correction matrices as mura compensation values of the display panel.
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13.发明授权公开(公告)号：US09570016B2
公开(公告)日：2017-02-14
申请号：US14448060
申请日：2014-07-31
Inventor： Zhiming Meng , Daekeun Yoon , Weihao Hu , Zongze He , Jianming Wang
IPC: G09G3/36 , G09G3/34 , F21V9/10 , G02F1/1335
CPC classification number: G09G3/3413 , F21V9/40 , F21Y2113/13 , F21Y2115/10 , G02F1/1336 , G09G3/3426 , G09G2320/062 , G09G2320/0646 , G09G2360/16
Abstract: The present invention provides a light source control module, a backlight module and driving method thereof which can overcome the problems of insufficient color amount, poor performance and lowered color saturation. A light source control module of the present invention is used for separately controlling illumination colors and/or brightness of each light source in the backlight module according to image information. The driving method of the backlight module comprises: calculating representative color and/or brightness of each image section based on image information, wherein each image section corresponds to a light output area on the output surface of the backlight module, each light output area is illuminated by one light source in the backlight module; adjusting the illumination colors and/or brightness of each light source such that the color and/or brightness of each light output area is in conformity with the representative color and/or brightness of corresponding image section.
Abstract translation: 本发明提供一种光源控制模块，背光模块及其驱动方法，其可以克服颜色不足，性能差和色饱和度降低的问题。 根据图像信息，本发明的光源控制模块用于分别控制背光模块中的每个光源的照明颜色和/或亮度。 背光模块的驱动方法包括：基于图像信息计算每个图像部分的代表性颜色和/或亮度，其中每个图像部分对应于背光模块的输出表面上的光输出区域，每个光输出区域被照亮 通过背光模块中的一个光源; 调整每个光源的照明颜色和/或亮度，使得每个光输出区域的颜色和/或亮度与相应图像部分的代表性颜色和/或亮度一致。
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公开(公告)号：US11616895B2
公开(公告)日：2023-03-28
申请号：US16957463
申请日：2019-12-25
Inventor： Yu Zhang , Xiuyun Chen , Zongze He , Feng Long , Pin Xiao , Yuxuan Chen
Abstract: Disclosed is a method for converting image data. The method includes: acquiring image data of a target image, wherein the image data includes first pixel values of m pixels in the target image, each of the first pixel values includes a first color value of at least one color channel, the first color value being within a target color value interval of the at least one color channel; dividing the target color value interval into n color value partitions; determining a color value partition where the first color value falls from the n color value partitions; and converting the first color value into a second color value according to a position of the first color value in the color value partition, the number of bits occupied by the second color value being less than the number of bits occupied by the first color value.
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公开(公告)号：US20220066612A1
公开(公告)日：2022-03-03
申请号：US17279716
申请日：2020-08-28
Inventor： Pin Xiao , Xiuyun Chen , Zongze He , Zhenguo Xu , Yehao Zhang , Yadong Huang , Jing Zhao
Abstract: A display apparatus and a method of powering the display apparatus are provided. The display apparatus includes: a main control circuit, configured to provide a first control signal; a touch display driving circuit, configured to provide a second control signal; a power supply circuit, coupled to the touch display driving circuit, and configured to provide a power supply voltage to the touch display driving circuit; and a logic circuit coupled to the main control circuit, the touch display driving circuit, and the power supply circuit, and configured to continuously enable the power supply circuit in a first mode and intermittently enable the power supply circuit in a second mode, under a control of the first control signal and the second control signal.
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Patent Agency Ranking
公开(公告)号：US20210125647A1
公开(公告)日：2021-04-29
申请号：US16834667
申请日：2020-03-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Junrui Zhang , Xuehui Zhu , Ronghua Lan , Zongze He , Yehao Zhang
Abstract: A signal generator includes N stages of cascaded control signal generating circuits, and is configured to receive K clock signals whose valid pulse edges are different from each other by a set time, an n-th control signal generating circuit of the N stages of control signal generating circuit generates a strobe signal based on a k-th clock signal of the K clock signals and sequentially outputs at least two different clock signals of other K−1 clock signals based on the strobe signal. A valid pulse edge of the k-th clock signal is within a valid pulse duration of a strobe signal of an (n−1)-th stage control signal generating circuit.
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公开(公告)号：US10887584B2
公开(公告)日：2021-01-05
申请号：US16019957
申请日：2018-06-27
Inventor： Liang Zhang , Zongze He , Zhiming Meng , Jianguang Yang , Shuo Li , Zhipeng Feng , Zhenghua Lu , Yuxuan Chen , Feng Long
IPC: H04N13/398 , H04N13/302 , H04N13/368 , G02F1/29 , H04N13/376 , H04N13/373 , H04N13/31 , G06T7/70 , G06T7/50
Abstract: A naked-eye three-dimensional display device includes a display panel, a liquid crystal grating, a processor and an image collector, wherein, the image collector is configured to obtain first current viewing information and second current viewing information, and send the same to the processor; the processor is configured to receive and store the first and second current viewing information, adjust a width and/or a position of a light transmitting region of the liquid crystal grating according to the first current viewing information, and adjust an output picture of the display panel, according to the second current, viewing information and the width and/or the position of the light transmitting region of the liquid crystal grating adjusted.
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公开(公告)号：US09881947B2
公开(公告)日：2018-01-30
申请号：US14905385
申请日：2015-07-16
Inventor： Zongze He , Jianming Wang , Zhiming Meng , Weihao Hu
IPC: H01L27/14 , H01L27/13 , H01L21/77 , H01L27/12 , H01L23/522 , H01L23/64 , G02F1/1362 , G02F1/1333
CPC classification number: H01L27/13 , G02F1/136286 , G02F2001/133388 , H01L21/77 , H01L23/5227 , H01L23/645 , H01L27/124 , H01L27/1262 , H01L2021/775
Abstract: An array substrate and a manufacturing method thereof, comprising a base substrate, and a gate, a gate insulating layer, an active layer and a source/drain arranged on the base substrate, the array substrate further comprising an antenna for receiving and/or transmitting wireless signals, the antenna being arranged on the base substrate. By arranging the antenna on the base substrate of the array substrate, the antenna is integrated directly in the display panel. Thus, not only the area of the PCB circuit board in the display device can be reduced, but also the spare area in the array substrate can be utilized sufficiently, thereby improving the integration level of the display device and reducing the total volume of the display device.
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19.发明授权公开(公告)号：US09824612B2
公开(公告)日：2017-11-21
申请号：US14316198
申请日：2014-06-26
Inventor： Weihao Hu , Yoon Dae Keun , Yanping Liao , Yufan Du , Zongze He , Yangbing Yu
CPC classification number: G09G3/003 , G09G2310/0221 , G09G2310/024 , G09G2320/0209 , H04N13/341 , H04N13/398
Abstract: The disclosure provides a display panel, a method for driving the display panel and a 3D display device including the display panel, and relates to the technical field of display. The display panel comprises a display unit and at least one timing control units, wherein the display unit comprises a plurality of display regions and the plurality of display regions are simultaneously scanned. With the present invention, wire impedance in the display panel is reduced, charging time for a single row of pixels can be reduced and charging rate of the pixels can be improved.
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公开(公告)号：US09620606B2
公开(公告)日：2017-04-11
申请号：US15176388
申请日：2016-06-08
Inventor： Zongze He
IPC: H01L29/78 , H01L29/786 , H01L29/66 , H01L33/08 , H01L21/302 , H01L21/331 , H01L29/423 , G02F1/1343 , G02F1/1368 , H01L21/02 , H01L27/12 , H01L29/45 , H01L29/49
CPC classification number: H01L29/42384 , G02F1/134309 , G02F1/13439 , G02F1/1368 , H01L21/02532 , H01L21/02576 , H01L21/02592 , H01L27/1222 , H01L27/1262 , H01L29/42376 , H01L29/45 , H01L29/4908 , H01L29/495 , H01L29/4966 , H01L29/6675 , H01L29/78696
Abstract: The present disclosure relates to the field of liquid crystal display, and provides a method for manufacturing a TFT and the TFT thereof. The TFT includes: a base substrate; a gate electrode with a three-dimensional structure formed on the base substrate; a gate insulating layer for completely covering a top face and two side faces of the gate electrode; a semiconductor layer for completely covering a top face and two side faces of the gate insulating layer; a buffer layer for covering a top face and two side faces of the semiconductor layer at two ends of the semiconductor layer; and source and drain electrodes for completely covering a top face and two side faces of the buffer layer, wherein the semiconductor layer of the TFT is of a three-dimensional structure.
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