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41 条记录 (耗时 0.024 秒)

    Multi-layer differential phase shift keying with bit-interleaved coded modulation and OFDM
    13.
    发明授权
    Multi-layer differential phase shift keying with bit-interleaved coded modulation and OFDM 失效
    具有位交织编码调制和OFDM的多层差分相移键控

    公开(公告)号：US07324613B2

    公开(公告)日：2008-01-29

    申请号：US10721533

    申请日：2003-11-25

    申请人： Yuguang Fang ,  Byung-Seo Kim

    发明人： Yuguang Fang ,  Byung-Seo Kim

    IPC分类号： H03D3/22 ,  H04K1/10

    CPC分类号： H04L27/205 ,  H04L27/2071 ,  H04L27/2075

    摘要： An efficient system and method for modulation and demodulation to achieve a high data rate using Bit-Interleaved Coded Modulation and OFDM uses either a coherent or a non-coherent transmission scheme using differential modulation. In order to maintain a high data rate impervious to sudden phase changes, a communication system uses an efficient constellation having multiple rings with different sizes and modulation/demodulation schemes utilizing this constellation. In power line communications, the channel gain information is obtained easily at a receiver (100) while the phase information is not. Thus, the communication system uses an absolute magnitude and differential phase coding for modulation and demodulation of the signals.

    摘要翻译： 用于使用比特交错编码调制实现高数据速率的调制和解调的有效系统和方法使用差分调制使用相干或非相干传输方案。 为了保持突发相位变化的高数据速率，通信系统使用具有不同大小的多个环的有效星座和利用该星座的调制/解调方案。 在电力线通信中，在相位信息不是在接收器（100）处容易地获得信道增益信息。 因此，通信系统使用绝对幅度和差分相位编码来进行信号的调制和解调。

    Semiconductor memory device with stacked memory cell and method of manufacturing the stacked memory cell
    17.
    发明授权
    Semiconductor memory device with stacked memory cell and method of manufacturing the stacked memory cell 有权
    具有堆叠存储单元的半导体存储器件和制造堆叠存储单元的方法

    公开(公告)号：US08179711B2

    公开(公告)日：2012-05-15

    申请号：US12273225

    申请日：2008-11-18

    申请人： Sung-min Kim ,  Eun-jung Yun ,  Jong-soo Seo ,  Du-eung Kim ,  Beak-hyung Cho ,  Byung-seo Kim

    发明人： Sung-min Kim ,  Eun-jung Yun ,  Jong-soo Seo ,  Du-eung Kim ,  Beak-hyung Cho ,  Byung-seo Kim

    IPC分类号： G11C11/00

    CPC分类号： G11C13/003 ,  G11C5/02 ,  G11C7/18 ,  G11C11/15 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/71 ,  G11C2213/74 ,  G11C2213/79 ,  H01L27/24

    摘要： In a semiconductor memory device and method, resistive-change memory cells are provided, each including a plurality of control transistors formed on different layers and variable resistance devices comprising a resistive-change memory. Each resistive-change memory cell includes a plurality of control transistors formed on different layers, and a variable resistance device formed of a resistive-change memory. In one example, the number of the control transistors is two. The semiconductor memory device includes a global bit line; a plurality of local bit lines connected to or disconnected from the global bit line via local bit line selection circuits which correspond to the local bit lines, respectively; and a plurality of resistive-change memory cell groups storing data while being connected to the local bit lines, respectively. Each of the resistive-change memory cells of each of the resistive-change memory cell groups comprises a plurality of control transistors formed on different layers, and a variable resistance device formed of a resistive-change memory. In addition, the semiconductor memory device has a hierarchical bit line structure that uses a global bit line and local bit lines. Accordingly, it is possible to increase both the integration density of the semiconductor memory device and the amount of current flowing through each of the resistive-change memory cells.

    摘要翻译： 在半导体存储器件和方法中，提供了电阻变化存储单元，每个包括形成在不同层上的多个控制晶体管和包括电阻变化存储器的可变电阻器件。 每个电阻变化存储单元包括形成在不同层上的多个控制晶体管和由电阻变化存储器形成的可变电阻器件。 在一个示例中，控制晶体管的数量是两个。 半导体存储器件包括全局位线; 通过分别对应于本地位线的本地位线选择电路分别连接到全局位线或与全局位线断开的多个局部位线; 以及分别在连接到本地位线时存储数据的多个电阻变化存储单元组。 每个电阻变化存储单元组中的每个电阻变化存储单元包括形成在不同层上的多个控制晶体管和由电阻变化存储器形成的可变电阻器件。 此外，半导体存储器件具有使用全局位线和局部位线的分层位线结构。 因此，可以增加半导体存储器件的集成密度和流过每个电阻变化存储单元的电流量。

    Method for managing scanning of channels in a wireless network
    19.
    发明授权
    Method for managing scanning of channels in a wireless network 有权
    管理无线网络中信道扫描的方法

    公开(公告)号：US07620397B2

    公开(公告)日：2009-11-17

    申请号：US11426777

    申请日：2006-06-27

    申请人： Byung Seo Kim ,  Ye Chen

    发明人： Byung Seo Kim ,  Ye Chen

    IPC分类号： H04W4/00

    CPC分类号： H04W48/16 ,  H04W72/02 ,  H04W76/10 ,  H04W76/20

    摘要： A method for managing scanning of a plurality of channels in a wireless network is disclosed. The method comprises detecting by a station that a first channel in a plurality of channels is being used for a communication by another station, determining a duration of the communication based upon the communication information, setting a Network Allocation Vector for the station based on the determined duration, scanning a number of channels during the determined duration, and returning to the first channel upon at least one of a) completion of the step of scanning and b) an end of the determined duration.

    摘要翻译： 公开了一种用于管理无线网络中的多个信道的扫描的方法。 该方法包括：通过一个站检测多个信道中的第一信道正被另一个站的通信使用，基于该通信信息确定通信的持续时间，基于确定的该设置来设置该站的网络分配向量 持续时间，在确定的持续时间期间扫描多个信道，并且在以下中的至少一个返回到第一信道：a）完成扫描步骤，以及b）所确定的持续时间的结束。

    Phase change memory and method of fabricating the same
    20.
    发明申请
    Phase change memory and method of fabricating the same 失效
    相变记忆及其制造方法

    公开(公告)号：US20090163023A1

    公开(公告)日：2009-06-25

    申请号：US12314884

    申请日：2008-12-18

    申请人： Yoon-Jong Song ,  Byung-Seo Kim ,  Kyung-Chang Ryoo

    发明人： Yoon-Jong Song ,  Byung-Seo Kim ,  Kyung-Chang Ryoo

    IPC分类号： H01L21/44

    CPC分类号： H01L45/1675 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144

    摘要： A method of fabricating a phase change memory includes forming a lower electrode on a semiconductor substrate, forming a phase change pattern, an upper electrode, and a hard mask pattern sequentially on the lower electrode, a width of a bottom surface of the hard mask pattern being greater than a width of a top surface of the hard mask pattern, the bottom surface of the hard mask pattern facing the upper electrode and being opposite the top surface of the hard mask pattern, and forming a capping layer to cover the top surface of the hard mask pattern and sidewalls of the hard mask pattern, phase change pattern, and upper electrode.

    摘要翻译： 制造相变存储器的方法包括在半导体衬底上形成下电极，在下电极上依次形成相变图案，上电极和硬掩模图案，硬掩模图案的底面宽度 大于硬掩模图案的顶表面的宽度，硬掩模图案的底表面面向上电极并且与硬掩模图案的顶表面相对，并且形成覆盖层以覆盖硬掩模图案的顶表面 硬掩模图案和硬掩模图案的侧壁，相变图案和上电极。