公开(公告)号：US20110227221A1

公开(公告)日：2011-09-22

申请号：US13028836

申请日：2011-02-16

申请人： Ji-Yong Park ,  Hee-Seok Lee ,  Chul-Woo Kim ,  Sang-Gui Jo ,  Kwang-Jin Bae ,  Seung-Hwan Kim

发明人： Ji-Yong Park ,  Hee-Seok Lee ,  Chul-Woo Kim ,  Sang-Gui Jo ,  Kwang-Jin Bae ,  Seung-Hwan Kim

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L24/03 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/0557 ,  H01L2224/0603 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/1403 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2224/05552 ,  H01L2924/00

摘要： An electronic device includes first and second interconnections formed on a first surface of a substrate and spaced apart from each other. The electronic device includes a first insulating material layer disposed on the substrate including the first and second interconnections and including a first opening exposing a predetermined region of the first interconnection. The electronic device further includes a first pad filling the first opening and having a greater width than the first opening. The first pad covers at least a part of the second interconnection adjacent to one end of the first interconnection, and the first pad is electrically insulated from the second interconnection by the first insulating material layer.

摘要翻译： 电子设备包括形成在基板的第一表面上并彼此间隔开的第一和第二互连。 电子设备包括设置在基板上的第一绝缘材料层，包括第一和第二互连，并且包括暴露第一互连的预定区域的第一开口。 电子设备还包括填充第一开口并且具有比第一开口更大的宽度的第一垫。 第一焊盘覆盖与第一互连的一端相邻的第二互连的至少一部分，并且第一焊盘通过第一绝缘材料层与第二互连电绝缘。

公开(公告)号：US07952199B2

公开(公告)日：2011-05-31

申请号：US12684476

申请日：2010-01-08

申请人： Sang-Gui Jo ,  Seung-Kon Mok ,  Han-Shin Youn

发明人： Sang-Gui Jo ,  Seung-Kon Mok ,  Han-Shin Youn

IPC分类号： H01L23/488

CPC分类号： H05K1/111 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3457 ,  H05K2201/094 ,  H05K2201/0969 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49155 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A circuit board and a semiconductor package having the same are provided. The circuit board comprises a base substrate having interconnections, and solder ball lands disposed on one surface of the base substrate. The solder ball lands respectively have land holes having different sizes. The land hole disposed at the center portion of the base substrate and the land hole disposed at the edge portion of the base substrate may have different sizes. For example, the sizes of the land holes may increase from the center portion of the base substrate to the edge portion thereof, and alternatively, the sizes of the land holes may decrease from the center portion of the base substrate to the edge portion thereof.

摘要翻译： 提供一种电路板和具有该电路板的半导体封装。 电路板包括具有互连的基底基板和设置在基底基板的一个表面上的焊球接地。 焊球分别具有不同尺寸的接地孔。 设置在基底基板的中心部分处的接地孔和设置在基底基板的边缘部分处的接地孔可以具有不同的尺寸。 例如，可以从基底基板的中央部到边缘部的尺寸增大，或者，基板的中心部分的边缘部分的尺寸也可能减小。

公开(公告)号：US20090108447A1

公开(公告)日：2009-04-30

申请号：US12243621

申请日：2008-10-01

申请人： Sang-Gui JO ,  Seung-Kon MOK

发明人： Sang-Gui JO ,  Seung-Kon MOK

IPC分类号： H01L23/49

CPC分类号： H01L23/585 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/859 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device is provided, including a semiconductor chip having fine pitch bond pads, dummy bond pads, and ball bonds formed on the semiconductor chip, and electrically connected to circuits of the semiconductor chip, where the width of each fine pitch bond pad is less than the diameter of each ball bond. The dummy bond pads are formed between adjacent bond pads and have a plurality of lands not connected to each other. The ball bonds may be connected to the bond pads in a zigzag configuration and are partially connected to the dummy bond pads. Accordingly, the pitch between bond pads is reduced while preventing short circuits between adjacent ball bonds.

摘要翻译： 提供一种半导体器件，其包括形成在半导体芯片上的具有细间距接合焊盘，虚拟接合焊盘和球接合的半导体芯片，并且电连接到半导体芯片的电路，其中每个细间距接合焊盘的宽度较小 比每个球接头的直径。 虚拟接合焊盘形成在相邻接合焊盘之间并且具有彼此不连接的多个焊盘。 球形接合可以以锯齿形结构连接到接合焊盘，并且部分连接到虚拟接合焊盘。 因此，接合焊盘之间的间距减小，同时防止相邻的焊球之间的短路。

公开(公告)号：US20100116539A1

公开(公告)日：2010-05-13

申请号：US12684476

申请日：2010-01-08

申请人： Sang-Gui Jo ,  Seung-Kon Mok ,  Han-Shin Youn

发明人： Sang-Gui Jo ,  Seung-Kon Mok ,  Han-Shin Youn

IPC分类号： H05K1/11

CPC分类号： H05K1/111 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3457 ,  H05K2201/094 ,  H05K2201/0969 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49155 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A circuit board and a semiconductor package having the same are provided. The circuit board comprises a base substrate having interconnections, and solder ball lands disposed on one surface of the base substrate. The solder ball lands respectively have land holes having different sizes. The land hole disposed at the center portion of the base substrate and the land hole disposed at the edge portion of the base substrate may have different sizes. For example, the sizes of the land holes may increase from the center portion of the base substrate to the edge portion thereof, and alternatively, the sizes of the land holes may decrease from the center portion of the base substrate to the edge portion thereof.

摘要翻译： 提供一种电路板和具有该电路板的半导体封装。 电路板包括具有互连的基底基板和设置在基底基板的一个表面上的焊球接地。 焊球分别具有不同尺寸的接地孔。 设置在基底基板的中心部分处的接地孔和设置在基底基板的边缘部分处的接地孔可以具有不同的尺寸。 例如，可以从基底基板的中央部到边缘部的尺寸增大，或者，基板的中心部分的边缘部分的尺寸也可能减小。

公开(公告)号：US07667325B2

公开(公告)日：2010-02-23

申请号：US11745342

申请日：2007-05-07

申请人： Sang-Gui Jo ,  Seung-Kon Mok ,  Han-Shin Youn

发明人： Sang-Gui Jo ,  Seung-Kon Mok ,  Han-Shin Youn

IPC分类号： H01L23/488

CPC分类号： H05K1/111 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3457 ,  H05K2201/094 ,  H05K2201/0969 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49155 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A circuit board and a semiconductor package having the same are provided. The circuit board comprises a base substrate having interconnections, and solder ball lands disposed on one surface of the base substrate. The solder ball lands respectively have land holes having different sizes. The land hole disposed at the center portion of the base substrate and the land hole disposed at the edge portion of the base substrate may have different sizes. For example, the sizes of the land holes may increase from the center portion of the base substrate to the edge portion thereof, and alternatively, the sizes of the land holes may decrease from the center portion of the base substrate to the edge portion thereof.

摘要翻译： 提供一种电路板和具有该电路板的半导体封装。 电路板包括具有互连的基底基板和设置在基底基板的一个表面上的焊球接地。 焊球分别具有不同尺寸的接地孔。 设置在基底基板的中心部分处的接地孔和设置在基底基板的边缘部分处的接地孔可以具有不同的尺寸。 例如，可以从基底基板的中央部到边缘部的尺寸增大，或者，基底基板的中央部分的边缘部分的尺寸也可能减小。

公开(公告)号：US08466554B2

公开(公告)日：2013-06-18

申请号：US13028836

申请日：2011-02-16

申请人： Ji-Yong Park ,  Hee-Seok Lee ,  Chul-Woo Kim ,  Sang-Gui Jo ,  Kwang-Jin Bae ,  Seung-Hwan Kim

发明人： Ji-Yong Park ,  Hee-Seok Lee ,  Chul-Woo Kim ,  Sang-Gui Jo ,  Kwang-Jin Bae ,  Seung-Hwan Kim

IPC分类号： H01L23/498 ,  H01L21/768 ,  H01L23/12 ,  H01L23/053

CPC分类号： H01L24/03 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/0557 ,  H01L2224/0603 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/1403 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2224/05552 ,  H01L2924/00

摘要： An electronic device includes first and second interconnections formed on a first surface of a substrate and spaced apart from each other. The electronic device includes a first insulating material layer disposed on the substrate including the first and second interconnections and including a first opening exposing a predetermined region of the first interconnection. The electronic device further includes a first pad filling the first opening and having a greater width than the first opening. The first pad covers at least a part of the second interconnection adjacent to one end of the first interconnection, and the first pad is electrically insulated from the second interconnection by the first insulating material layer.

摘要翻译： 电子设备包括形成在基板的第一表面上并彼此间隔开的第一和第二互连。 电子设备包括设置在基板上的第一绝缘材料层，包括第一和第二互连，并且包括暴露第一互连的预定区域的第一开口。 电子设备还包括填充第一开口并且具有比第一开口更大的宽度的第一垫。 第一焊盘覆盖与第一互连的一端相邻的第二互连的至少一部分，并且第一焊盘通过第一绝缘材料层与第二互连电绝缘。

公开(公告)号：US20090273076A1

公开(公告)日：2009-11-05

申请号：US12385731

申请日：2009-04-17

申请人： Kyong-sei CHOI ,  Byung-seo Kim ,  Young-jae Joo ,  Ye-chung Chung ,  Kyong-soon Cho ,  Sang-heui Lee ,  Si-hoon Lee ,  Sa-yoon Kang ,  Dae-woo Son ,  Sang-gui Jo ,  Jeong-kyu Ha ,  Young-sang Cho

发明人： Kyong-sei CHOI ,  Byung-seo Kim ,  Young-jae Joo ,  Ye-chung Chung ,  Kyong-soon Cho ,  Sang-heui Lee ,  Si-hoon Lee ,  Sa-yoon Kang ,  Dae-woo Son ,  Sang-gui Jo ,  Jeong-kyu Ha ,  Young-sang Cho

IPC分类号： H01L23/498 ,  H01L23/36

CPC分类号： H01L23/49838 ,  H01L23/4985 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01079 ,  H05K1/0203 ,  H05K1/189 ,  H05K2201/09109 ,  H05K2201/1028 ,  H05K2201/10674 ,  H05K2203/1581 ,  H01L2924/00

摘要： Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.

摘要翻译： 公开了一种片上胶片（COF）型半导体封装以及使用其的器件。 COF型半导体封装可以包括包括顶表面和底表面的绝缘衬底，绝缘衬底的顶表面上的半导体器件，绝缘衬底的底表面上的散热部件，以及绝缘衬底的至少一个空间 绝缘基板的底表面和散热部件的顶表面。

公开(公告)号：US08828795B2

公开(公告)日：2014-09-09

申请号：US13616618

申请日：2012-09-14

申请人： Sang-Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

发明人： Sang-Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

IPC分类号： H01L21/60 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.

摘要翻译： 一种半导体封装，包括基底基板，安装在基底基板上的半导体芯片，并且包括接合焊盘，与基板上的半导体芯片相邻设置并电连接到焊盘的第一和第二连接端子， 所述基底基板电连接到所述第一连接端子，与所述连接端子间隔开的第二球形台面，设置在所述第二球形台面与所述第一和第二连接端子中的至少一个之间的所述第一球形区域， 第一球接地，但暴露第二球台的至少一部分，以及延伸到第一绝缘层上并将第二连接端子连接到第二球台的第一导线。

公开(公告)号：US08222089B2

公开(公告)日：2012-07-17

申请号：US13033307

申请日：2011-02-23

申请人： Kyoung-sei Choi ,  Byung-seo Kim ,  Young-jae Joo ,  Ye-chung Chung ,  Kyong-soon Cho ,  Sang-heui Lee ,  Si-hoon Lee ,  Sa-yoon Kang ,  Dae-woo Son ,  Sang-gui Jo ,  Jeong-kyu Ha ,  Young-sang Cho

发明人： Kyoung-sei Choi ,  Byung-seo Kim ,  Young-jae Joo ,  Ye-chung Chung ,  Kyong-soon Cho ,  Sang-heui Lee ,  Si-hoon Lee ,  Sa-yoon Kang ,  Dae-woo Son ,  Sang-gui Jo ,  Jeong-kyu Ha ,  Young-sang Cho

IPC分类号： H01J9/00

CPC分类号： H01L23/49838 ,  H01L23/4985 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01079 ,  H05K1/0203 ,  H05K1/189 ,  H05K2201/09109 ,  H05K2201/1028 ,  H05K2201/10674 ,  H05K2203/1581 ,  H01L2924/00

摘要： Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.

摘要翻译： 公开了一种片上胶片（COF）型半导体封装以及使用其的器件。 COF型半导体封装可以包括包括顶表面和底表面的绝缘衬底，绝缘衬底的顶表面上的半导体器件，绝缘衬底的底表面上的散热部件，以及绝缘衬底的至少一个空间 绝缘基板的底表面和散热部件的顶表面。

公开(公告)号：US20100314760A1

公开(公告)日：2010-12-16

申请号：US12794027

申请日：2010-06-04

申请人： Sang Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

发明人： Sang Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

IPC分类号： H01L23/538 ,  H01L23/488 ,  H01L23/498

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.

摘要翻译： 一种半导体封装，包括基底基板，安装在基底基板上的半导体芯片，并且包括接合焊盘，与基板上的半导体芯片相邻设置并电连接到焊盘的第一和第二连接端子， 所述基底基板电连接到所述第一连接端子，与所述连接端子间隔开的第二球形台面，设置在所述第二球形台面与所述第一和第二连接端子中的至少一个之间的所述第一球形区域， 第一球接地，但暴露第二球台的至少一部分，以及延伸到第一绝缘层上并将第二连接端子连接到第二球台的第一导线。