公开(公告)号：US08828795B2

公开(公告)日：2014-09-09

申请号：US13616618

申请日：2012-09-14

申请人： Sang-Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

发明人： Sang-Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

IPC分类号： H01L21/60 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.

摘要翻译： 一种半导体封装，包括基底基板，安装在基底基板上的半导体芯片，并且包括接合焊盘，与基板上的半导体芯片相邻设置并电连接到焊盘的第一和第二连接端子， 所述基底基板电连接到所述第一连接端子，与所述连接端子间隔开的第二球形台面，设置在所述第二球形台面与所述第一和第二连接端子中的至少一个之间的所述第一球形区域， 第一球接地，但暴露第二球台的至少一部分，以及延伸到第一绝缘层上并将第二连接端子连接到第二球台的第一导线。

公开(公告)号：US20100314760A1

公开(公告)日：2010-12-16

申请号：US12794027

申请日：2010-06-04

申请人： Sang Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

发明人： Sang Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

IPC分类号： H01L23/538 ,  H01L23/488 ,  H01L23/498

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.

摘要翻译： 一种半导体封装，包括基底基板，安装在基底基板上的半导体芯片，并且包括接合焊盘，与基板上的半导体芯片相邻设置并电连接到焊盘的第一和第二连接端子， 所述基底基板电连接到所述第一连接端子，与所述连接端子间隔开的第二球形台面，设置在所述第二球形台面与所述第一和第二连接端子中的至少一个之间的所述第一球形区域， 第一球接地，但暴露第二球台的至少一部分，以及延伸到第一绝缘层上并将第二连接端子连接到第二球台的第一导线。

公开(公告)号：US20130005092A1

公开(公告)日：2013-01-03

申请号：US13616618

申请日：2012-09-14

申请人： Sang-Gui JO ,  Ji-Yong PARK ,  Kwangjin BAE ,  Soyoung LIM

发明人： Sang-Gui JO ,  Ji-Yong PARK ,  Kwangjin BAE ,  Soyoung LIM

IPC分类号： H01L21/60

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.

摘要翻译： 一种半导体封装，包括基底基板，安装在基底基板上的半导体芯片，并且包括接合焊盘，与基板上的半导体芯片相邻设置并电连接到焊盘的第一和第二连接端子， 所述基底基板电连接到所述第一连接端子，与所述连接端子间隔开的第二球形台面，设置在所述第二球形台面与所述第一和第二连接端子中的至少一个之间的所述第一球形区域，第一绝缘层覆盖层 第一球接地，但暴露第二球台的至少一部分，以及延伸到第一绝缘层上并将第二连接端子连接到第二球台的第一导线。

公开(公告)号：US08304892B2

公开(公告)日：2012-11-06

申请号：US12794027

申请日：2010-06-04

申请人： Sang-Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

发明人： Sang-Gui Jo ,  Ji-Yong Park ,  Kwangjin Bae ,  Soyoung Lim

IPC分类号： H01L23/488

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.

摘要翻译： 一种半导体封装，包括基底基板，安装在基底基板上的半导体芯片，并且包括接合焊盘，与基板上的半导体芯片相邻设置并电连接到焊盘的第一和第二连接端子， 所述基底基板电连接到所述第一连接端子，与所述连接端子间隔开的第二球形台面，设置在所述第二球形台面与所述第一和第二连接端子中的至少一个之间的所述第一球形区域， 第一球接地，但暴露第二球台的至少一部分，以及延伸到第一绝缘层上并将第二连接端子连接到第二球台的第一导线。