公开(公告)号：US20140175640A1

公开(公告)日：2014-06-26

申请号：US14039092

申请日：2013-09-27

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungMoon Kim ,  KooHong Lee ,  JaeHak Yee ,  YoungChul Kim ,  Lan Hoang ,  Pandi C. Marimuthu ,  Steve Anderson ,  HunTeak Lee ,  HeeJo Chi

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11002 ,  H01L2224/1134 ,  H01L2224/13023 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/7598 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00012

Abstract: A semiconductor device has a plurality of semiconductor die disposed over a carrier. An electrical interconnect, such as a stud bump, is formed over the semiconductor die. The stud bumps are trimmed to a uniform height. A substrate includes a bump over the substrate. The electrical interconnect of the semiconductor die is bonded to the bumps of the substrate while the semiconductor die is disposed over the carrier. An underfill material is deposited between the semiconductor die and substrate. Alternatively, an encapsulant is deposited over the semiconductor die and substrate using a chase mold. The bonding of stud bumps of the semiconductor die to bumps of the substrate is performed using gang reflow or thermocompression while the semiconductor die are in reconstituted wafer form and attached to the carrier to provide a high throughput of the flipchip type interconnect to the substrate.

Abstract translation: 半导体器件具有设置在载体上的多个半导体管芯。 在半导体管芯上方形成诸如柱形凸块的电互连。 螺柱凸块被修剪成均匀的高度。 衬底包括在衬底上的凸块。 将半导体管芯的电气互连结合到衬底的凸块上，同时将半导体管芯设置在载体上。 在半导体管芯和衬底之间沉积底部填充材料。 或者，使用追逐模具在半导体管芯和衬底上沉积密封剂。 半导体管芯的凸起凸块与衬底的凸起的接合是使用回流焊或热压而进行的，同时半导体管芯是重新构成的晶片形式并且附着到载体上，以提供与衬底的倒装芯片型互连的高通量。

公开(公告)号：US20130221452A1

公开(公告)日：2013-08-29

申请号：US13853969

申请日：2013-03-29

Applicant: Stats ChipPAC, Ltd.

Inventor： Thomas J. Strothmann ,  Steve Anderson ,  Byung Joon Han ,  Il Kwon Shim ,  Heap Hoe Kuan

IPC: H01L29/66 ,  H01L21/56

CPC classification number: H01L29/66 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/73209 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A conductive layer can be formed over the encapsulant and the semiconductor die. A transmissive layer can be formed over the semiconductor die. An interconnect structure can be formed through the encapsulant and electrically connected to the conductive layer, whereby the interconnect structure is formed off to only one side of the semiconductor die.

Abstract translation: 半导体器件具有沉积在半导体管芯上的半导体管芯和密封剂。 可以在密封剂和半导体管芯上方形成导电层。 可以在半导体管芯上形成透射层。 可以通过密封剂形成互连结构并且电连接到导电层，由此互连结构仅形成在半导体管芯的仅一侧。

公开(公告)号：US09721921B2

公开(公告)日：2017-08-01

申请号：US15012346

申请日：2016-02-01

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungMoon Kim ,  KooHong Lee ,  JaeHak Yee ,  YoungChul Kim ,  Lan Hoang ,  Pandi C. Marimuthu ,  Steve Anderson ,  HunTeak Lee ,  HeeJo Chi

IPC: H01L21/44 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L21/78 ,  H01L23/31

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11002 ,  H01L2224/1134 ,  H01L2224/13023 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/7598 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00012

Abstract: A semiconductor device has a plurality of semiconductor die disposed over a carrier. An electrical interconnect, such as a stud bump, is formed over the semiconductor die. The stud bumps are trimmed to a uniform height. A substrate includes a bump over the substrate. The electrical interconnect of the semiconductor die is bonded to the bumps of the substrate while the semiconductor die is disposed over the carrier. An underfill material is deposited between the semiconductor die and substrate. Alternatively, an encapsulant is deposited over the semiconductor die and substrate using a chase mold. The bonding of stud bumps of the semiconductor die to bumps of the substrate is performed using gang reflow or thermocompression while the semiconductor die are in reconstituted wafer form and attached to the carrier to provide a high throughput of the flipchip type interconnect to the substrate.

公开(公告)号：US20160163675A1

公开(公告)日：2016-06-09

申请号：US15012346

申请日：2016-02-01

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungMoon Kim ,  KooHong Lee ,  JaeHak Yee ,  YoungChul Kim ,  Lan Hoang ,  Pandi C. Marimuthu ,  Steve Anderson ,  HunTeak Lee ,  HeeJo Chi

IPC: H01L23/00 ,  H01L21/78 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11002 ,  H01L2224/1134 ,  H01L2224/13023 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/7598 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00012

Abstract: A semiconductor device has a plurality of semiconductor die disposed over a carrier. An electrical interconnect, such as a stud bump, is formed over the semiconductor die. The stud bumps are trimmed to a uniform height. A substrate includes a bump over the substrate. The electrical interconnect of the semiconductor die is bonded to the bumps of the substrate while the semiconductor die is disposed over the carrier. An underfill material is deposited between the semiconductor die and substrate. Alternatively, an encapsulant is deposited over the semiconductor die and substrate using a chase mold. The bonding of stud bumps of the semiconductor die to bumps of the substrate is performed using gang reflow or thermocompression while the semiconductor die are in reconstituted wafer form and attached to the carrier to provide a high throughput of the flipchip type interconnect to the substrate.

Abstract translation: 半导体器件具有设置在载体上的多个半导体管芯。 在半导体管芯上方形成诸如柱形凸块的电互连。 螺柱凸块被修剪成均匀的高度。 衬底包括在衬底上的凸块。 将半导体管芯的电气互连结合到衬底的凸块上，同时将半导体管芯设置在载体上。 在半导体管芯和衬底之间沉积底部填充材料。 或者，使用追逐模具在半导体管芯和衬底上沉积密封剂。 半导体管芯的凸起凸块与衬底的凸起的接合是使用回流焊或热压而进行的，同时半导体管芯是重新构成的晶片形式并且附着到载体上，以提供与衬底的倒装芯片型互连的高通量。

公开(公告)号：US09553162B2

公开(公告)日：2017-01-24

申请号：US13853969

申请日：2013-03-29

Applicant: STATS ChipPAC, Ltd.

Inventor： Thomas J. Strothmann ,  Steve Anderson ,  Byung Joon Han ,  Il Kwon Shim ,  Heap Hoe Kuan

IPC: H01L29/66 ,  H01L21/56 ,  H01L23/00 ,  H01L27/146 ,  H01L23/31

CPC classification number: H01L29/66 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/73209 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A conductive layer can be formed over the encapsulant and the semiconductor die. A transmissive layer can be formed over the semiconductor die. An interconnect structure can be formed through the encapsulant and electrically connected to the conductive layer, whereby the interconnect structure is formed off to only one side of the semiconductor die.

Abstract translation: 半导体器件具有沉积在半导体管芯上的半导体管芯和密封剂。 可以在密封剂和半导体管芯上方形成导电层。 可以在半导体管芯上形成透射层。 可以通过密封剂形成互连结构并且电连接到导电层，由此互连结构仅形成在半导体管芯的仅一侧。

公开(公告)号：US09287204B2

公开(公告)日：2016-03-15

申请号：US14039092

申请日：2013-09-27

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungMoon Kim ,  KooHong Lee ,  JaeHak Yee ,  YoungChul Kim ,  Lan Hoang ,  Pandi C. Marimuthu ,  Steve Anderson ,  HunTeak Lee ,  HeeJo Chi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11002 ,  H01L2224/1134 ,  H01L2224/13023 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/7598 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00012

Abstract: A semiconductor device has a plurality of semiconductor die disposed over a carrier. An electrical interconnect, such as a stud bump, is formed over the semiconductor die. The stud bumps are trimmed to a uniform height. A substrate includes a bump over the substrate. The electrical interconnect of the semiconductor die is bonded to the bumps of the substrate while the semiconductor die is disposed over the carrier. An underfill material is deposited between the semiconductor die and substrate. Alternatively, an encapsulant is deposited over the semiconductor die and substrate using a chase mold. The bonding of stud bumps of the semiconductor die to bumps of the substrate is performed using gang reflow or thermocompression while the semiconductor die are in reconstituted wafer form and attached to the carrier to provide a high throughput of the flipchip type interconnect to the substrate.

Abstract translation: 半导体器件具有设置在载体上的多个半导体管芯。 在半导体管芯上方形成诸如柱形凸块的电互连。 螺柱凸块被修剪成均匀的高度。 衬底包括在衬底上的凸块。 将半导体管芯的电气互连结合到衬底的凸块上，同时将半导体管芯设置在载体上。 在半导体管芯和衬底之间沉积底部填充材料。 或者，使用追逐模具在半导体管芯和衬底上沉积密封剂。 半导体管芯的凸起凸块与衬底的凸起的接合是使用回流焊或热压而进行的，同时半导体管芯是重新构成的晶片形式并且附着到载体上，以提供与衬底的倒装芯片型互连的高通量。

公开(公告)号：US09245770B2

公开(公告)日：2016-01-26

申请号：US14038339

申请日：2013-09-26

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungMoon Kim ,  KooHong Lee ,  JaeHak Yee ,  YoungChul Kim ,  Lan Hoang ,  Pandi C. Marimuthu ,  Steve Anderson ,  HeeJo Chi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L21/56 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3192 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81466 ,  H01L2224/81484 ,  H01L2224/81907 ,  H01L2224/8191 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/11 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/81805

Abstract: A semiconductor device has a semiconductor die disposed over a substrate. The semiconductor die and substrate are placed in a chase mold. An encapsulant is deposited over and between the semiconductor die and substrate simultaneous with bonding the semiconductor die to the substrate in the chase mold. The semiconductor die is bonded to the substrate using thermocompression by application of force and elevated temperature. An electrical interconnect structure, such as a bump, pillar bump, or stud bump, is formed over the semiconductor die. A flux material is deposited over the interconnect structure. A solder paste or SOP is deposited over a conductive layer of the substrate. The flux material and SOP provide temporary bond between the semiconductor die and substrate. The interconnect structure is bonded to the SOP. Alternatively, the interconnect structure can be bonded directly to the conductive layer of the substrate, with or without the flux material.

Abstract translation: 半导体器件具有设置在衬底上的半导体管芯。 将半导体管芯和衬底放置在追逐模具中。 在半导体管芯和衬底之上和之间沉积密封剂，同时将半导体管芯与追逐模具中的衬底结合。 通过施加力和升高的温度，使用热压将半导体管芯结合到衬底上。 在半导体管芯上方形成电连接结构，例如凸块，柱凸块或凸块。 焊剂材料沉积在互连结构上。 在基板的导电层上沉积焊膏或SOP。 焊剂材料和SOP在半导体管芯和衬底之间提供临时粘结。 互连结构与SOP结合。 或者，互连结构可以直接结合到衬底的导电层，具有或不具有焊剂材料。

公开(公告)号：US09240331B2

公开(公告)日：2016-01-19

申请号：US14039418

申请日：2013-09-27

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungMoon Kim ,  KooHong Lee ,  JaeHak Yee ,  YoungChul Kim ,  Lan Hoang ,  Pandi C. Marimuthu ,  Steve Anderson ,  See Chian Lim ,  HeeJo Chi

IPC: H01L23/52 ,  H01L29/40 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L21/4867 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/10165 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13294 ,  H01L2224/13311 ,  H01L2224/13313 ,  H01L2224/13316 ,  H01L2224/13324 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13794 ,  H01L2224/138 ,  H01L2224/16112 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1701 ,  H01L2224/17517 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/81007 ,  H01L2224/81011 ,  H01L2224/81022 ,  H01L2224/81024 ,  H01L2224/8114 ,  H01L2224/81192 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/81424 ,  H01L2224/81815 ,  H01L2224/81986 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/81805

Abstract: A semiconductor device includes a substrate with contact pads. A mask is disposed over the substrate. Aluminum-wettable conductive paste is printed over the contact pads of the substrate. A semiconductor die is disposed over the aluminum-wettable conductive paste. The aluminum-wettable conductive paste is reflowed to form an interconnect structure over the contact pads of the substrate. The contact pads include aluminum. Contact pads of the semiconductor die are disposed over the aluminum-wettable conductive paste. The aluminum-wettable conductive paste is reflowed to form an interconnect structure between the contact pads of the semiconductor die and the contact pads of the substrate. The interconnect structure is formed directly on the contact pads of the substrate and semiconductor die. The contact pads of the semiconductor die are etched prior to reflowing the aluminum-wettable conductive paste. An epoxy pre-dot to maintain a separation between the semiconductor die and substrate.

Abstract translation: 半导体器件包括具有接触焊盘的衬底。 掩模设置在基板上。 铝可润湿的导电浆料印刷在基材的接触垫上。 将半导体管芯设置在铝可润湿的导电膏上。 铝可湿性导电膏被回流以在衬底的接触焊盘上形成互连结构。 接触垫包括铝。 半导体管芯的接触焊盘设置在铝可润湿的导电膏上。 铝可润湿的导电膏被回流以在半导体管芯的接触焊盘和衬底的接触焊盘之间形成互连结构。 互连结构直接形成在基板和半导体管芯的接触焊盘上。 在回流铝可湿性导电膏之前，蚀刻半导体管芯的接触焊盘。 环氧预处理点，以保持半导体管芯和衬底之间的间隔。

公开(公告)号：US20140175661A1

公开(公告)日：2014-06-26

申请号：US14039418

申请日：2013-09-27

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungMoon Kim ,  KooHong Lee ,  JaeHak Yee ,  YoungChul Kim ,  Lan Hoang ,  Pandi C. Marimuthu ,  Steve Anderson ,  See Chian Lim ,  HeeJo Chi

IPC: H01L23/48 ,  H01L21/56

CPC classification number: H01L21/4867 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/10165 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13294 ,  H01L2224/13311 ,  H01L2224/13313 ,  H01L2224/13316 ,  H01L2224/13324 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13794 ,  H01L2224/138 ,  H01L2224/16112 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1701 ,  H01L2224/17517 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/81007 ,  H01L2224/81011 ,  H01L2224/81022 ,  H01L2224/81024 ,  H01L2224/8114 ,  H01L2224/81192 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/81424 ,  H01L2224/81815 ,  H01L2224/81986 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/81805

Abstract: A semiconductor device includes a substrate with contact pads. A mask is disposed over the substrate. Aluminum-wettable conductive paste is printed over the contact pads of the substrate. A semiconductor die is disposed over the aluminum-wettable conductive paste. The aluminum-wettable conductive paste is reflowed to form an interconnect structure over the contact pads of the substrate. The contact pads include aluminum. Contact pads of the semiconductor die are disposed over the aluminum-wettable conductive paste. The aluminum-wettable conductive paste is reflowed to form an interconnect structure between the contact pads of the semiconductor die and the contact pads of the substrate. The interconnect structure is formed directly on the contact pads of the substrate and semiconductor die. The contact pads of the semiconductor die are etched prior to reflowing the aluminum-wettable conductive paste. An epoxy pre-dot to maintain a separation between the semiconductor die and substrate.

Abstract translation: 半导体器件包括具有接触焊盘的衬底。 掩模设置在基板上。 铝可润湿的导电膏被印刷在基底的接触垫上。 将半导体管芯设置在铝可润湿的导电膏上。 铝可湿性导电膏被回流以在衬底的接触焊盘上形成互连结构。 接触垫包括铝。 半导体管芯的接触焊盘设置在铝可润湿的导电膏上。 铝可润湿的导电膏被回流以在半导体管芯的接触焊盘和衬底的接触焊盘之间形成互连结构。 互连结构直接形成在基板和半导体管芯的接触焊盘上。 在回流铝可湿性导电膏之前，蚀刻半导体管芯的接触焊盘。 环氧预处理点，以保持半导体管芯和衬底之间的间隔。

公开(公告)号：US20140175639A1

公开(公告)日：2014-06-26

申请号：US14038339

申请日：2013-09-26

Applicant: STATS ChipPAC, Ltd.

Inventor： KyungMoon Kim ,  KooHong Lee ,  JaeHak Yee ,  YoungChul Kim ,  Lan Hoang ,  Pandi C. Marimuthu ,  Steve Anderson ,  HeeJo Chi

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L21/56 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3192 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81466 ,  H01L2224/81484 ,  H01L2224/81907 ,  H01L2224/8191 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/11 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/81805

Abstract: A semiconductor device has a semiconductor die disposed over a substrate. The semiconductor die and substrate are placed in a chase mold. An encapsulant is deposited over and between the semiconductor die and substrate simultaneous with bonding the semiconductor die to the substrate in the chase mold. The semiconductor die is bonded to the substrate using thermocompression by application of force and elevated temperature. An electrical interconnect structure, such as a bump, pillar bump, or stud bump, is formed over the semiconductor die. A flux material is deposited over the interconnect structure. A solder paste or SOP is deposited over a conductive layer of the substrate. The flux material and SOP provide temporary bond between the semiconductor die and substrate. The interconnect structure is bonded to the SOP. Alternatively, the interconnect structure can be bonded directly to the conductive layer of the substrate, with or without the flux material.

Abstract translation: 半导体器件具有设置在衬底上的半导体管芯。 将半导体管芯和衬底放置在追逐模具中。 在半导体管芯和衬底之上和之间沉积密封剂，同时将半导体管芯与追逐模具中的衬底结合。 通过施加力和升高的温度，使用热压将半导体管芯结合到衬底上。 在半导体管芯上方形成电连接结构，例如凸块，柱凸块或凸块。 焊剂材料沉积在互连结构上。 在基板的导电层上沉积焊膏或SOP。 焊剂材料和SOP在半导体管芯和衬底之间提供临时粘结。 互连结构与SOP结合。 或者，互连结构可以直接结合到衬底的导电层，具有或不具有助焊剂材料。