公开(公告)号：US20180355510A1

公开(公告)日：2018-12-13

申请号：US15869905

申请日：2018-01-12

申请人： Samsung Electronics Co., Ltd.

发明人： Keum Seok Park ,  Gyeom Kim ,  Yi Hwan Kim ,  Sun Jung Kim ,  Pan Kwi Park ,  Jeong Ho Yoo

IPC分类号： C30B25/12 ,  C23C16/458

CPC分类号： C30B25/12 ,  C23C16/4585 ,  H01L29/0847 ,  H01L29/66795

摘要： A semiconductor process chamber includes a susceptor, a base plate surrounding the susceptor, a liner on an inner sidewall of the base plate, and a preheat ring between the susceptor and the base plate and coplanar with the susceptor. The process chamber further includes an upper dome coupled to the base plate and covering an upper surface of the susceptor. The upper dome includes a first section on an upper surface of the base plate and a second section extending from the first section and overlapping the susceptor. The first section includes a first region on the upper surface of the base plate, a second region extending from the first region past the base plate, and a third region extending from the second region with a decreasing thickness to contact the second section.

公开(公告)号：US10128112B2

公开(公告)日：2018-11-13

申请号：US15595945

申请日：2017-05-16

申请人： Samsung Electronics Co., Ltd.

发明人： Cho Eun Lee ,  Jin Bum Kim ,  Kang Hun Moon ,  Jae Myung Choe ,  Sun Jung Kim ,  Dong Suk Shin ,  Il Gyou Shin ,  Jeong Ho Yoo

IPC分类号： H01L21/336 ,  H01L21/02 ,  H01L21/223 ,  H01L29/66

摘要： A method of fabricating a semiconductor device is provided. The method includes forming a dummy gate electrode on a substrate, forming a trench on a side surface of the dummy gate electrode, performing a bake process of removing an impurity from the trench and forming a source/drain in the trench, wherein the bake process comprises a first stage and a second stage following the first stage, an air pressure in which the substrate is disposed during the first stage is different from an air pressure in which the substrate is disposed during the second stage, and the bake process is performed while the substrate is on a stage rotating the substrate, wherein a revolution per minute (RPM) of the substrate during the first stage is different from a revolution per minute (RPM) of the substrate during the second stage.

公开(公告)号：US10211322B1

公开(公告)日：2019-02-19

申请号：US15896277

申请日：2018-02-14

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jin Bum Kim ,  Tae Jin Park ,  Jong Min Lee ,  Seok Hoon Kim ,  Dong Chan Suh ,  Jeong Ho Yoo ,  Ha Kyu Seong ,  Dong Suk Shin

IPC分类号： H01L29/66 ,  H01L29/40 ,  H01L29/78

摘要： A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a channel pattern on a substrate, the channel pattern extending in a first direction; a gate pattern on the substrate, the gate pattern extending in a second direction crossing the first direction and surrounding the channel pattern; and an interface layer between the channel pattern and the gate pattern, the interface layer being formed on at least one surface of an upper surface and a lower surface of the channel pattern.

公开(公告)号：US11821106B2

公开(公告)日：2023-11-21

申请号：US15869905

申请日：2018-01-12

申请人： Samsung Electronics Co., Ltd.

发明人： Keum Seok Park ,  Gyeom Kim ,  Yi Hwan Kim ,  Sun Jung Kim ,  Pan Kwi Park ,  Jeong Ho Yoo

IPC分类号： C30B25/12 ,  C23C16/458 ,  H01L29/66 ,  H01L29/08

CPC分类号： C30B25/12 ,  C23C16/4585 ,  H01L29/0847 ,  H01L29/66636 ,  H01L29/66795

摘要： A semiconductor process chamber includes a susceptor, a base plate surrounding the susceptor, a liner on an inner sidewall of the base plate, and a preheat ring between the susceptor and the base plate and coplanar with the susceptor. The process chamber further includes an upper dome coupled to the base plate and covering an upper surface of the susceptor. The upper dome includes a first section on an upper surface of the base plate and a second section extending from the first section and overlapping the susceptor. The first section includes a first region on the upper surface of the base plate, a second region extending from the first region past the base plate, and a third region extending from the second region with a decreasing thickness to contact the second section.

公开(公告)号：US10084049B2

公开(公告)日：2018-09-25

申请号：US15685255

申请日：2017-08-24

申请人： Samsung Electronics Co., Ltd.

发明人： Jin Bum Kim ,  Gyeom Kim ,  Seok Hoon Kim ,  Tae Jin Park ,  Jeong Ho Yoo ,  Cho Eun Lee ,  Hyun Jung Lee ,  Sun Jung Kim ,  Dong Suk Shin

IPC分类号： H01L27/12 ,  H01L29/417 ,  H01L27/092 ,  H01L29/51 ,  H01L29/423 ,  H01L21/02 ,  H01L21/3205

CPC分类号： H01L29/41725 ,  H01L21/02425 ,  H01L21/28518 ,  H01L21/32053 ,  H01L21/823814 ,  H01L21/823821 ,  H01L23/485 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/42356 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7848 ,  H01L2924/0002

摘要： A semiconductor device includes: a substrate having an active region; a gate structure disposed in the active region; source/drain regions respectively formed within portions of the active region disposed on both sides of the gate structure; a metal silicide layer disposed on a surface of each of the source/drain regions; and contact plugs disposed on the source/drain regions and electrically connected to the source/drain regions through the metal silicide layer, respectively. The metal silicide layer is formed so as to have a monocrystalline structure.