Semiconductor device and method of manufacturing the same

    公开(公告)号:US11195849B2

    公开(公告)日:2021-12-07

    申请号:US16570067

    申请日:2019-09-13

    摘要: In one embodiment, a semiconductor device includes a first film including a plurality of electrode layers and a plurality of insulating layers provided alternately in a first direction, and a first semiconductor layer provided in the first film via a charge storage layer and extending in the first direction. The device further includes a first conductive member provided in the first film and extending in the first direction, and a second semiconductor layer provided on the first film to contact the first semiconductor layer. The second semiconductor layer includes a first surface on a side of the first film, and a second surface on an opposite side of the first surface. The second surface is an uneven face protruding towards the first direction.

    Substrate treatment method and substrate treatment apparatus

    公开(公告)号:US10529588B2

    公开(公告)日:2020-01-07

    申请号:US16012866

    申请日:2018-06-20

    摘要: In accordance with an embodiment, a substrate treatment method includes bringing a first metallic film on a substrate into contact with a first liquid, mixing a second liquid into the first liquid, and bringing the first metallic film or a second metallic film different from the first metallic film into contact with a liquid in which the first liquid and the second liquid are mixed together to etch the first or second metallic film. The first liquid includes an oxidizing agent, a complexing agent, and water (H2O) of a first content rate to etch the first metallic film. The second liquid includes water (H2O) at a second content rate higher than the first content rate after the etching has started.

    MEMORY DEVICE AND METHOD FOR MANUFACTURING MEMORY DEVICE

    公开(公告)号:US20190067319A1

    公开(公告)日:2019-02-28

    申请号:US15917954

    申请日:2018-03-12

    摘要: A memory device includes first and second conductive layers, first and second semiconductor members, first and second charge storage members, first and second insulating members, and first and second insulating layers. The second conductive layer is distant from the first conductive layer. The first semiconductor member is positioned between the first and second conductive layers. The second semiconductor member is positioned between the first semiconductor member and the second conductive layer. The first insulating layer includes a first region positioned between the first semiconductor member and the first charge storage member and a second region positioned between the first semiconductor member and the second semiconductor member. The second insulating layer includes a third region positioned between the second semiconductor member and the second charge storage member and a fourth region positioned between the second region and the second semiconductor member.