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公开(公告)号：US12022643B2
公开(公告)日：2024-06-25
申请号：US17036418
申请日：2020-09-29
发明人： Chih-Yu Hsu , Jian-Hao Chen , Chia-Wei Chen , Shan-Mei Liao , Hui-Chi Chen , Yu-Chia Liang , Shih-Hao Lin , Kuei-Lun Lin , Kuo-Feng Yu , Feng-Cheng Yang , Yen-Ming Chen
CPC分类号： H10B10/12
摘要： A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.
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公开(公告)号：US20230386926A1
公开(公告)日：2023-11-30
申请号：US18363945
申请日：2023-08-02
发明人： Chia-Ching Lee , Hsin-Han Tsai , Shih-Hang Chiu , Tsung-Ta Tang , Chung-Chiang Wu , Hung-Chin Chung , Hsien-Ming Lee , Da-Yuan Lee , Jian-Hao Chen , Chien-Hao Chen , Kuo-Feng Yu , Chia-Wei Chen , Chih-Yu Hsu
IPC分类号： H01L21/8234 , H01L27/088 , H01L29/40 , H01L29/66 , H01L29/49
CPC分类号： H01L21/82345 , H01L27/0886 , H01L29/401 , H01L29/66545 , H01L29/4966
摘要： A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
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公开(公告)号：US11437280B2
公开(公告)日：2022-09-06
申请号：US16900439
申请日：2020-06-12
发明人： Chia-Ching Lee , Hsin-Han Tsai , Shih-Hang Chiu , Tsung-Ta Tang , Chung-Chiang Wu , Hung-Chin Chung , Hsien-Ming Lee , Da-Yuan Lee , Jian-Hao Chen , Chien-Hao Chen , Kuo-Feng Yu , Chia-Wei Chen , Chih-Yu Hsu
IPC分类号： H01L21/8234 , H01L27/088 , H01L29/40 , H01L29/66
摘要： A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
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公开(公告)号：US20220384454A1
公开(公告)日：2022-12-01
申请号：US17884442
申请日：2022-08-09
发明人： Chih-Yu Hsu , Jian-Hao Chen , Chia-Wei Chen , Shan-Mei Liao , Hui-Chi Chen , Yu-Chia Liang , Shih-Hao Lin , Kuei-Lun Lin , Kuo-Feng Yu , Feng-Cheng Yang , Yen-Ming Chen
IPC分类号： H01L27/11
摘要： A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.
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公开(公告)号：US20220359296A1
公开(公告)日：2022-11-10
申请号：US17870343
申请日：2022-07-21
发明人： Chia-Ching Lee , Hsin-Han Tsai , Shih-Hang Chiu , Tsung-Ta Tang , Chung-Chiang Wu , Hung-Chin Chung , Hsien-Ming Lee , Da-Yuan Lee , Jian-Hao Chen , Chien-Hao Chen , Kuo-Feng Yu , Chia-Wei Chen , Chih-Yu Hsu
IPC分类号： H01L21/8234 , H01L27/088 , H01L29/40 , H01L29/66
摘要： A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
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公开(公告)号：US20210305258A1
公开(公告)日：2021-09-30
申请号：US17036418
申请日：2020-09-29
发明人： Chih-Yu Hsu , Jian-Hao Chen , Chia-Wei Chen , Shan-Mei Liao , Hui-Chi Chen , Yu-Chia Liang , Shih-Hao Lin , Kuei-Lun Lin , Kuo-Feng Yu , Feng-Cheng Yang , Yen-Ming Chen
IPC分类号： H01L27/11
摘要： A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.
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公开(公告)号：US12040235B2
公开(公告)日：2024-07-16
申请号：US17870343
申请日：2022-07-21
发明人： Chia-Ching Lee , Hsin-Han Tsai , Shih-Hang Chiu , Tsung-Ta Tang , Chung-Chiang Wu , Hung-Chin Chung , Hsien-Ming Lee , Da-Yuan Lee , Jian-Hao Chen , Chien-Hao Chen , Kuo-Feng Yu , Chia-Wei Chen , Chih-Yu Hsu
IPC分类号： H01L21/8234 , H01L27/088 , H01L29/40 , H01L29/49 , H01L29/66
CPC分类号： H01L21/82345 , H01L27/0886 , H01L29/401 , H01L29/4966 , H01L29/66545
摘要： A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
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公开(公告)号：US20210391219A1
公开(公告)日：2021-12-16
申请号：US16900439
申请日：2020-06-12
发明人： Chia-Ching Lee , Hsin-Han Tsai , Shih-Hang Chiu , Tsung-Ta Tang , Chung-Chiang Wu , Hung-Chin Chung , Hsien-Ming Lee , Da-Yuan Lee , Jian-Hao Chen , Chien-Hao Chen , Kuo-Feng Yu , Chia-Wei Chen , Chih-Yu Hsu
IPC分类号： H01L21/8234 , H01L29/66 , H01L29/40 , H01L27/088
摘要： A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
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9.发明公开公开(公告)号：US20240313119A1
公开(公告)日：2024-09-19
申请号：US18673746
申请日：2024-05-24
发明人： Shih-Hao Lin , Chih-Hsuan Chen , Chia-Hao Pao , Chih-Chuan Yang , Chih-Yu Hsu , Hsin-Wen Su , Chia-Wei Chen
IPC分类号： H01L29/786 , H01L21/8238 , H01L27/092 , H01L29/06 , H01L29/167 , H01L29/45 , H01L29/66
CPC分类号： H01L29/78621 , H01L21/823814 , H01L27/092 , H01L29/167 , H01L29/66553 , H01L29/66742 , H01L29/78696 , H01L29/0665 , H01L29/456
摘要： A semiconductor structure includes a first pair of source/drain features (S/D), a first stack of channel layers connected to the first pair of S/D, a second pair of S/D, and a second stack of channel layers connected to the second pair of S/D. The first pair of S/D each include a first epitaxial layer having a first dopant, a second epitaxial layer having a second dopant and disposed over the first epitaxial layer and connected to the first stack of channel layers, and a third epitaxial layer having a third dopant and disposed over the second epitaxial layer. The second pair of S/D each include a fourth epitaxial layer having a fourth dopant and connected to the second stack of channel layers, and a fifth epitaxial layer having a fifth dopant and disposed over the fourth epitaxial layer. The first dopant through the fourth dopant are of different species.
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公开(公告)号：US12041760B2
公开(公告)日：2024-07-16
申请号：US17884442
申请日：2022-08-09
发明人： Chih-Yu Hsu , Jian-Hao Chen , Chia-Wei Chen , Shan-Mei Liao , Hui-Chi Chen , Yu-Chia Liang , Shih-Hao Lin , Kuei-Lun Lin , Kuo-Feng Yu , Feng-Cheng Yang , Yen-Ming Chen
CPC分类号： H10B10/12
摘要： A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.
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