公开(公告)号：US20230378294A1

公开(公告)日：2023-11-23

申请号：US18366410

申请日：2023-08-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia-Yuan Chang ,  Te-Yang Lai ,  Kuei-Lun Lin ,  Xiong-Fei Yu ,  Chi On Chui ,  Tsung-Da Lin ,  Cheng-Hao Hou

IPC分类号： H01L29/423 ,  H01L29/78 ,  H01L21/8234 ,  H01L27/092

CPC分类号： H01L29/42364 ,  H01L29/785 ,  H01L21/823431 ,  H01L21/823462 ,  H01L27/0924 ,  H01L2029/7858

摘要： A method includes providing first and second channel layers in NMOS and PMOS regions respectively of a substrate; depositing a first layer comprising hafnium oxide over the first and second channel layers; forming a first dipole pattern over the second channel layer and not over the first channel layer; driving a first metal from the first dipole pattern into the first layer by annealing; removing the first dipole pattern; depositing a second layer comprising hafnium oxide over the first layer and over the first and second channel layers; forming a second dipole pattern over the second layer and the first channel layer and not over the second channel layer; driving a second metal from the second dipole pattern into the second layer by annealing; removing the second dipole pattern; and depositing a third layer comprising hafnium oxide over the second layer and over the first and the second channel layers.

公开(公告)号：US20230335551A1

公开(公告)日：2023-10-19

申请号：US17896970

申请日：2022-08-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yao-Teng Chuang ,  Kuei-Lun Lin ,  Te-Yang Lai ,  Da-Yuan Lee ,  Weng Chang ,  Chi On Chui

IPC分类号： H01L27/088 ,  H01L21/8234

CPC分类号： H01L27/0886 ,  H01L21/823431

摘要： Semiconductor devices and methods of manufacturing semiconductor devices with differing threshold voltages are provided. In embodiments the threshold voltages of individual semiconductor devices are tuned through the deposition, diffusion, and removal of dipole materials in order to provide different dipole regions within different transistors. These different dipole regions cause the different transistors to have different threshold voltages.

公开(公告)号：US20230163191A1

公开(公告)日：2023-05-25

申请号：US17713014

申请日：2022-04-04

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsin-Hua Lee ,  Da-Yuan Lee ,  Kuei-Lun Lin

IPC分类号： H01L29/51 ,  H01L29/40 ,  H01L21/02

CPC分类号： H01L29/517 ,  H01L29/511 ,  H01L29/401 ,  H01L21/02205 ,  H01L21/0228 ,  H01L29/0665

摘要： A semiconductor device is provided in accordance with some embodiments. The semiconductor device includes an interfacial layer disposed over a channel region, a gate dielectric structure disposed over the channel region, and a gate electrode disposed over the gate dielectric structure. The gate dielectric structure includes a first layer of an oxide of a first metal disposed over the interfacial layer and a second layer of an oxide or silicate of a second metal disposed over the first layer. The first layer has a first thickness, and the second layer has second a thickness that is at least three times greater than the first thickness. An oxygen areal density of the oxide of the first metal is greater than an oxygen areal density of the oxide of the second metal.

公开(公告)号：US20220384454A1

公开(公告)日：2022-12-01

申请号：US17884442

申请日：2022-08-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Yu Hsu ,  Jian-Hao Chen ,  Chia-Wei Chen ,  Shan-Mei Liao ,  Hui-Chi Chen ,  Yu-Chia Liang ,  Shih-Hao Lin ,  Kuei-Lun Lin ,  Kuo-Feng Yu ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L27/11

摘要： A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.

公开(公告)号：US20210305258A1

公开(公告)日：2021-09-30

申请号：US17036418

申请日：2020-09-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Yu Hsu ,  Jian-Hao Chen ,  Chia-Wei Chen ,  Shan-Mei Liao ,  Hui-Chi Chen ,  Yu-Chia Liang ,  Shih-Hao Lin ,  Kuei-Lun Lin ,  Kuo-Feng Yu ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L27/11

摘要： A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.

公开(公告)号：US20190140082A1

公开(公告)日：2019-05-09

申请号：US15876223

申请日：2018-01-22

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia-Yuan Chang ,  Che-Hao Chang ,  Cheng-Hao Hou ,  Kuei-Lun Lin ,  Kun-Yu Lee ,  Xiong-Fei Yu ,  Chi-On Chui

IPC分类号： H01L29/66 ,  H01L29/51 ,  H01L29/78 ,  H01L29/40 ,  H01L21/02 ,  H01L21/28

CPC分类号： H01L29/66795 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02271 ,  H01L21/28158 ,  H01L29/408 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

摘要： Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure over the substrate. The gate structure includes a high-k layer over the substrate, a shieling layer over the high-k layer, and an N-type work function metal layer over the shielding layer. In some embodiments, the shielding layer has a dielectric constant less than a dielectric constant of the high-k layer.

公开(公告)号：US12015066B2

公开(公告)日：2024-06-18

申请号：US17231649

申请日：2021-04-15

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia-Yuan Chang ,  Te-Yang Lai ,  Kuei-Lun Lin ,  Xiong-Fei Yu ,  Chi On Chui ,  Tsung-Da Lin ,  Cheng-Hao Hou

IPC分类号： H01L29/423 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/78

CPC分类号： H01L29/42364 ,  H01L21/823431 ,  H01L21/823462 ,  H01L27/0924 ,  H01L29/785 ,  H01L2029/7858

摘要： A method includes providing first and second channel layers in NMOS and PMOS regions respectively of a substrate; depositing a first layer comprising hafnium oxide over the first and second channel layers; forming a first dipole pattern over the second channel layer and not over the first channel layer; driving a first metal from the first dipole pattern into the first layer by annealing; removing the first dipole pattern; depositing a second layer comprising hafnium oxide over the first layer and over the first and second channel layers; forming a second dipole pattern over the second layer and the first channel layer and not over the second channel layer; driving a second metal from the second dipole pattern into the second layer by annealing; removing the second dipole pattern; and depositing a third layer comprising hafnium oxide over the second layer and over the first and the second channel layers.

公开(公告)号：US11862468B2

公开(公告)日：2024-01-02

申请号：US17162270

申请日：2021-01-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuei-Lun Lin ,  Chia-Wei Hsu ,  Xiong-Fei Yu ,  Chi On Chui ,  Chih-Yu Hsu ,  Jian-Hao Chen

IPC分类号： H01L21/28 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/3205 ,  H01L21/285 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/3213

CPC分类号： H01L21/28185 ,  H01L21/28525 ,  H01L21/32055 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/66545 ,  H01L29/66795 ,  H01L21/32051 ,  H01L21/32134 ,  H01L21/32135

摘要： In an embodiment, a method includes: depositing a gate dielectric layer on a first fin and a second fin, the first fin and the second fin extending away from a substrate in a first direction, a distance between the first fin and the second fin decreasing along the first direction; depositing a sacrificial layer on the gate dielectric layer by exposing the gate dielectric layer to a self-limiting source precursor and a self-reacting source precursor, the self-limiting source precursor reacting to form an initial layer of a material of the sacrificial layer, the self-reacting source precursor reacting to form a main layer of the material of the sacrificial layer; annealing the gate dielectric layer while the sacrificial layer covers the gate dielectric layer; after annealing the gate dielectric layer, removing the sacrificial layer; and after removing the sacrificial layer, forming a gate electrode layer on the gate dielectric layer.

公开(公告)号：US20230317790A1

公开(公告)日：2023-10-05

申请号：US18152601

申请日：2023-01-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yao-Teng Chuang ,  Kuei-Lun Lin ,  Te-Yang Lai ,  Da-Yuan Lee ,  Weng Chang ,  Chi On Chui

IPC分类号： H01L29/06 ,  H01L29/786 ,  H01L29/423 ,  H01L21/8234

CPC分类号： H01L29/0673 ,  H01L29/78696 ,  H01L29/42384 ,  H01L21/823412

摘要： In an embodiment, a semiconductor device is provided, which includes a first doped gate dielectric layer and a second doped gate dielectric layer, wherein the first doped gate dielectric layer and the second doped gate dielectric layer comprise a high-k material doped with a dipole dopant. The second doped gate dielectric layer has a second concentration of the first dipole dopant. The concentration of the dipole dopant in the first doped gate dielectric layer is greater than the concentration, and the concentration peak of the dipole dopant in the first doped gate dielectric layer is deeper than the concentration peak of the dipole dopant in the second doped gate dielectric layer. A first gate electrode over the first doped gate dielectric layer, and a second gate electrode over the second doped gate dielectric layer, the first gate electrode and the second gate electrode have a same width.

公开(公告)号：US20230135155A1

公开(公告)日：2023-05-04

申请号：US17648431

申请日：2022-01-20

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yen-Fu Chen ,  Kuei-Lun Lin ,  Da-Yuan Lee ,  Chi On Chui

IPC分类号： H01L21/02 ,  H01L29/66 ,  H01L21/768

摘要： A method includes forming a first trench and a second trench in a base structure. The first trench has a first aspect ratio, and the second trench has a second aspect ratio lower than the first aspect ratio. A deposition process is then performed to deposit a layer. The layer includes a first portion extending into the first trench, and a second portion extending into the second trench. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness by a first difference. The method further includes performing an etch-back process to etch the layer. After the etch-back process, the first portion has a third thickness, and the second portion has a fourth thickness. A second difference between the third thickness and the fourth thickness is smaller than the first difference.