公开(公告)号：US12051628B2

公开(公告)日：2024-07-30

申请号：US17977405

申请日：2022-10-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yu Yang ,  Yen-Ting Chen ,  Wei-Yang Lee ,  Fu-Kai Yang ,  Yen-Ming Chen

IPC分类号： H01L21/8234 ,  H01L21/033 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823468 ,  H01L21/0337 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823864 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785

摘要： Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate, at least two gate structures disposed over the substrate, each of the at least two gate structures including a gate electrode and a spacer disposed along sidewalls of the gate electrode, wherein the spacer includes a refill portion and a bottom portion, the refill portion of the spacer has a funnel shape such that a top surface of the refill portion of the spacer is larger than a bottom surface of the refill portion of the spacer, and a source/drain contact disposed over the substrate and between the spacers of the at least two gate structures.

公开(公告)号：US11901455B2

公开(公告)日：2024-02-13

申请号：US17813888

申请日：2022-07-20

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Su-Hao Liu ,  Kuo-Ju Chen ,  Kai-Hsuan Lee ,  I-Hsieh Wong ,  Cheng-Yu Yang ,  Liang-Yin Chen ,  Huicheng Chang ,  Yee-Chia Yeo ,  Syun-Ming Jang ,  Meng-Han Chou

IPC分类号： H01L21/266 ,  H01L21/3115 ,  H01L21/764 ,  H01L21/768 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/285 ,  H01L21/762 ,  H01L29/78 ,  H01L29/08 ,  H01L29/417 ,  H01L29/49

CPC分类号： H01L29/7851 ,  H01L21/266 ,  H01L21/31155 ,  H01L21/764 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76897 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L21/823871 ,  H01L29/0847 ,  H01L29/41725 ,  H01L29/41766 ,  H01L29/41791 ,  H01L29/4991 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/28518 ,  H01L21/76224 ,  H01L21/76843 ,  H01L21/76855 ,  H01L2221/1063

摘要： A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.

公开(公告)号：US20230052380A1

公开(公告)日：2023-02-16

申请号：US17977405

申请日：2022-10-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yu Yang ,  Yen-Ting Chen ,  Wei-Yang Lee ,  Fu-Kai Yang ,  Yen-Ming Chen

IPC分类号： H01L21/8238 ,  H01L29/66 ,  H01L21/033 ,  H01L21/8234 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06

摘要： Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate, at least two gate structures disposed over the substrate, each of the at least two gate structures including a gate electrode and a spacer disposed along sidewalls of the gate electrode, wherein the spacer includes a refill portion and a bottom portion, the refill portion of the spacer has a funnel shape such that a top surface of the refill portion of the spacer is larger than a bottom surface of the refill portion of the spacer, and a source/drain contact disposed over the substrate and between the spacers of the at least two gate structures.

公开(公告)号：US20210143069A1

公开(公告)日：2021-05-13

申请号：US17122535

申请日：2020-12-15

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yu Yang ,  Yen-Ting Chen ,  Wei-Yang Lee ,  Fu-Kai Yang ,  Yen-Ming Chen

IPC分类号： H01L21/8238 ,  H01L29/66 ,  H01L21/033 ,  H01L21/8234 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06

摘要： Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate, at least two gate structures disposed over the substrate, each of the at least two gate structures including a gate electrode and a spacer disposed along sidewalls of the gate electrode, wherein the spacer includes a refill portion and a bottom portion, the refill portion of the spacer has a funnel shape such that a top surface of the refill portion of the spacer is larger than a bottom surface of the refill portion of the spacer, and a source/drain contact disposed over the substrate and between the spacers of the at least two gate structures.

公开(公告)号：US20190074225A1

公开(公告)日：2019-03-07

申请号：US16181847

申请日：2018-11-06

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yu Yang ,  Chia-Ta Yu ,  Kai-Hsuan Lee ,  Sai-Hooi Yeong ,  Feng-Cheng Yang

IPC分类号： H01L21/8238 ,  H01L27/092

摘要： A method includes providing a device structure having a substrate, an isolation structure over the substrate, and two fins extending from the substrate and through the isolation structure, each fin having two source/drain (S/D) regions and a channel region; depositing a first dielectric layer over top and sidewall surfaces of the fins and over the isolation structure; forming a gate stack over the first dielectric layer and engaging each fin at the respective channel region; treating surfaces of the gate stack and the first dielectric layer such that the surfaces of the gate stack are more attachable to a second dielectric layer than the surfaces of the first dielectric layer are; after the treating of the surfaces, depositing the second dielectric layer; and etching the first dielectric layer to expose the S/D regions of the fins.

公开(公告)号：US11152486B2

公开(公告)日：2021-10-19

申请号：US16511258

申请日：2019-07-15

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yu Yang ,  Kai-Hsuan Lee ,  Wei-Yang Lee ,  Fu-Kai Yang ,  Yen-Ming Chen

IPC分类号： H01L29/66 ,  H01L27/088 ,  H01L29/40 ,  H01L29/417

摘要： Semiconductor devices and methods of forming the same are provided. A semiconductor device according to one embodiment includes a first gate stack, a second gate stack, a first source/drain feature disposed between the first and second gate stacks, and a source/drain contact over and electrically coupled to the first source/drain feature. The source/drain contact is spaced apart from each of the first and second gate stacks by an inner spacer disposed on sidewalls of the source/drain contact, a first air gap, a first gate spacer, and a second air gap separated from the first air gap by the first gate spacer.

公开(公告)号：US10103146B2

公开(公告)日：2018-10-16

申请号：US15838451

申请日：2017-12-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia-Ta Yu ,  Sheng-Chen Wang ,  Cheng-Yu Yang ,  Kai-Hsuan Lee ,  Sai-Hooi Yeong ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L21/00 ,  H01L21/8238 ,  H01L21/336 ,  H01L27/148 ,  H01L29/76 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/08

摘要： A FinFET device is provided. The FinFET device includes a plurality of fin structures that protrude upwardly out of a dielectric isolation structure. The FinFET device also includes a plurality of gate structures that partially wrap around the fin structures. The fin structures each extend in a first direction, and the gate structures each extend in a second direction different from the first direction. An epitaxial structure is formed over at least a side surface of each of the fin structures. The epitaxial structure includes: a first epi-layer, a second epi-layer, or a third epi-layer. The epitaxial structure formed over each fin structure is separated from adjacent epitaxial structures by a gap. A silicide layer is formed over each of the epitaxial structures. The silicide layer at least partially fills in the gap. Conductive contacts are formed over the silicide layer.

公开(公告)号：US20180166442A1

公开(公告)日：2018-06-14

申请号：US15838451

申请日：2017-12-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia-Ta Yu ,  Sheng-Chen Wang ,  Cheng-Yu Yang ,  Kai-Hsuan Lee ,  Sai-Hooi Yeong ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/08

CPC分类号： H01L27/0886 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823475 ,  H01L29/0847

摘要： A FinFET device is provided. The FinFET device includes a plurality of fin structures that protrude upwardly out of a dielectric isolation structure. The FinFET device also includes a plurality of gate structures that partially wrap around the fin structures. The fin structures each extend in a first direction, and the gate structures each extend in a second direction different from the first direction. An epitaxial structure is formed over at least a side surface of each of the fin structures. The epitaxial structure includes: a first epi-layer, a second epi-layer, or a third epi-layer. The epitaxial structure formed over each fin structure is separated from adjacent epitaxial structures by a gap. A silicide layer is formed over each of the epitaxial structures. The silicide layer at least partially fills in the gap. Conductive contacts are formed over the silicide layer.

公开(公告)号：US20240363426A1

公开(公告)日：2024-10-31

申请号：US18770349

申请日：2024-07-11

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yu Yang ,  Yen-Ting Chen ,  Wei-Yang Lee ,  Fu-Kai Yang ,  Yen-Ming Chen

IPC分类号： H01L21/8234 ,  H01L21/033 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823468 ,  H01L21/0337 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823864 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785

摘要： Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate, at least two gate structures disposed over the substrate, each of the at least two gate structures including a gate electrode and a spacer disposed along sidewalls of the gate electrode, wherein the spacer includes a refill portion and a bottom portion, the refill portion of the spacer has a funnel shape such that a top surface of the refill portion of the spacer is larger than a bottom surface of the refill portion of the spacer, and a source/drain contact disposed over the substrate and between the spacers of the at least two gate structures.

公开(公告)号：US11856743B2

公开(公告)日：2023-12-26

申请号：US17234201

申请日：2021-04-19

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kai-Hsuan Lee ,  Chia-Ta Yu ,  Cheng-Yu Yang ,  Sheng-Chen Wang ,  Sai-Hooi Yeong ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H10B10/00 ,  H01L21/8238 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/08 ,  H01L21/027 ,  H01L21/306 ,  H01L21/311 ,  H01L29/66 ,  H01L29/165

CPC分类号： H10B10/12 ,  H01L21/0273 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/6656 ,  H01L29/66636 ,  H10B10/18 ,  H01L21/823814 ,  H01L29/165

摘要： A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.