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    Resistive memory device and method of operating the same
    4.
    发明授权
    Resistive memory device and method of operating the same 有权
    电阻式存储器件及其操作方法

    公开(公告)号：US09558821B2

    公开(公告)日：2017-01-31

    申请号：US14645701

    申请日：2015-03-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-Kook Park ,  Dae-Seok Byeon ,  Yeong-Taek Lee ,  Hyo-Jin Kwon ,  Yong-Kyu Lee

    IPC: G11C11/00 ,  G11C13/00 ,  G11C11/56 ,  G11C11/16

    CPC classification number: G11C13/0069 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/5607 ,  G11C11/5664 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0064 ,  G11C13/0097 ,  G11C2013/0076 ,  G11C2213/71

    Abstract: Provided are a resistive memory device and a method of the resistive memory device. The method of operating the resistive memory device includes performing a pre-read operation on memory cells in response to a write command; performing an erase operation on one or more first memory cells on which a reset write operation is to be performed, determined based on a result of comparing pre-read data from the pre-read operation with write data; and performing set-direction programming on at least some memory cells from among the erased one or more first memory cells and on one or more second memory cells on which a set write operation is to be performed.

    Abstract translation: 提供了电阻式存储器件和电阻式存储器件的方法。 操作电阻式存储器件的方法包括：响应写入命令对存储器单元执行预读取操作; 基于将来自预读取操作的预读数据与写数据进行比较确定的一个或多个要执行复位写操作的第一存储单元执行擦除操作; 并且对被擦除的一个或多个第一存储器单元中的至少一些存储器单元以及要执行设定写入操作的一个或多个第二存储器单元执行设置方向编程。

    Resistive memory device and operating method
    5.
    发明授权
    Resistive memory device and operating method 有权
    电阻式存储器件及操作方法

    公开(公告)号：US09536605B2

    公开(公告)日：2017-01-03

    申请号：US14806780

    申请日：2015-07-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-Kook Park ,  Yeong-Taek Lee ,  Dae-Seok Byeon ,  Bo-Geun Kim

    IPC: G11C11/00 ,  G11C13/00 ,  G11C11/56 ,  G11C11/16

    CPC classification number: G11C13/004 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/5607 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0061 ,  G11C2013/0054 ,  G11C2213/71 ,  G11C2213/77

    Abstract: Provided are a resistive memory device including a plurality of memory cells, and a method of operating the resistive memory device. The resistive memory device includes a sensing circuit connected to a first signal line, to which a memory cell is connected, the sensing circuit sensing data stored in the memory cell based on a first reference current; and a reference time generator for generating a reference time signal that determines a time point when a result of the sensing is to be output, based on the first reference current.

    Abstract translation: 提供了包括多个存储单元的电阻式存储器件以及操作该电阻式存储器件的方法。 电阻式存储器件包括连接到存储单元连接到的第一信号线的感测电路，感测电路基于第一参考电流感测存储在存储器单元中的数据; 以及参考时间发生器，用于产生基于所述第一参考电流确定所述感测的结果的时间点的参考时间信号。

    Resistive memory device and method programming same
    7.
    发明授权
    Resistive memory device and method programming same 有权
    电阻式存储器件和方法编程相同

    公开(公告)号：US09171617B1

    公开(公告)日：2015-10-27

    申请号：US14667993

    申请日：2015-03-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-Kook Park ,  Yeong-Taek Lee ,  Dae-Seok Byeon ,  Yong-Kyu Lee ,  Hyo-Jin Kwon

    IPC: G11C11/00 ,  G11C13/00

    CPC classification number: G11C13/0069 ,  G11C13/0002 ,  G11C13/0064 ,  G11C2013/0066 ,  G11C2013/0076 ,  G11C2013/0092

    Abstract: A method of programming memory cells of a resistive memory device includes; applying a first current pulse to each of the plurality of memory cells; applying a second current pulse that increases by a first difference compared to the first current pulse to each of the plurality of memory cells to which the first current pulse is applied; and applying a third current pulse that increases by a second difference compared to the second current pulse to each of the plurality of memory cells to which the second current pulse is applied, wherein the first through third current pulses non-linearly increase, and the second difference is greater than the first difference.

    Abstract translation: 一种编程电阻式存储器件的存储单元的方法包括： 对所述多个存储单元中的每一个施加第一电流脉冲; 将与第一电流脉冲相比增加第一差的第二电流脉冲施加到施加了第一电流脉冲的多个存储单元中的每一个; 以及将与所述第二电流脉冲相比增加第二差的第三电流脉冲施加到施加所述第二电流脉冲的所述多个存储单元中的每一个，其中所述第一至第三电流脉冲非线性增加，并且所述第二电流脉冲 差异大于第一个差异。

    Resistive memory devices and methods of operating the same
    8.
    发明授权
    Resistive memory devices and methods of operating the same 有权
    电阻式存储器件及其操作方法

    公开(公告)号：US09129675B2

    公开(公告)日：2015-09-08

    申请号：US14027337

    申请日：2013-09-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ingyu Baek ,  Yeong-Taek Lee ,  KyungMin Kim

    IPC: G11C11/00 ,  G11C13/00

    CPC classification number: G11C13/0069 ,  G11C13/0007 ,  G11C13/004

    Abstract: Resistive memory driving methods are provided. The methods may include applying an operating voltage set according to a mode of operation to a selected word line among the plurality of word lines and a selected bit line among the plurality of bit lines within a line delay period.

    Abstract translation: 提供了电阻式存储器驱动方法。 所述方法可以包括根据操作模式对在多个字线中的所选字线和行延迟周期内的多个位线中的选定位线之间施加设置的工作电压。

    NONVOLATILE MEMORY DEVICE USING RESISTANCE MATERIAL AND METHOD OF DRIVING THE NONVOLATILE MEMORY DEVICE
    9.
    发明申请
    NONVOLATILE MEMORY DEVICE USING RESISTANCE MATERIAL AND METHOD OF DRIVING THE NONVOLATILE MEMORY DEVICE 有权
    使用电阻材料的非易失性存储器件和驱动非易失性存储器件的方法

    公开(公告)号：US20140119094A1

    公开(公告)日：2014-05-01

    申请号：US13940856

    申请日：2013-07-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sung-Yeon Lee ,  Yeong-Taek Lee

    IPC: G11C13/00

    CPC classification number: G11C13/004 ,  G11C11/16 ,  G11C11/1673 ,  G11C11/1693 ,  G11C11/5607 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C13/0007 ,  G11C2213/71 ,  G11C2213/72

    Abstract: Provided is a nonvolatile memory device using a resistance material and a method of driving the nonvolatile memory device. The nonvolatile memory device comprises a resistive memory cell which stores multiple bits; a sensing node; a clamping unit coupled between the resistive memory cell and the sensing node and provides a clamping bias to the resistive memory cell; a compensation unit which provides a compensation current to the sensing node; a sense amplifier coupled to the sensing node and senses a change in a level of the sensing node; and an encoder which codes an output value of the sense amplifier in response to a first clock signal. The clamping bias varies over time. The compensation current is constant during a read period.

    Abstract translation: 提供了使用电阻材料的非易失性存储器件和驱动非易失性存储器件的方法。 非易失性存储器件包括存储多个位的电阻存储器单元; 感测节点; 耦合在所述电阻存储器单元和所述感测节点之间的钳位单元，并向所述电阻性存储单元提供钳位偏置; 补偿单元，其向感测节点提供补偿电流; 感测放大器耦合到感测节点并感测感测节点的电平的变化; 以及编码器，其响应于第一时钟信号对读出放大器的输出值进行编码。 钳位偏置随时间而变化。 补偿电流在读取期间是恒定的。

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