公开(公告)号：US11798906B2

公开(公告)日：2023-10-24

申请号：US17551548

申请日：2021-12-15

申请人： Samsung Electronics Co., Ltd.

发明人： Jeong-gi Jin ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-Jin Lee

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H01L25/065

CPC分类号： H01L24/05 ,  H01L23/3157 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0221 ,  H01L2224/02126 ,  H01L2224/02206 ,  H01L2224/02215 ,  H01L2224/02335 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05564 ,  H01L2224/11849 ,  H01L2224/13013 ,  H01L2224/13025 ,  H01L2224/13026 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/13101 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00

摘要： A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.

公开(公告)号：US08987869B2

公开(公告)日：2015-03-24

申请号：US13738728

申请日：2013-01-10

申请人： Samsung Electronics Co., Ltd.

发明人： Jeong-gi Jin ,  Jeong-woo Park ,  Ju-il Choi

IPC分类号： H01L23/52 ,  H01L29/40 ,  H01L29/82 ,  H01L23/48 ,  H01L23/00 ,  H01L21/768 ,  H01L23/31

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2221/6835 ,  H01L2224/03828 ,  H01L2224/11002 ,  H01L2224/11009 ,  H01L2224/11462 ,  H01L2224/1161 ,  H01L2224/1162 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/13616 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/1369 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/81011 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00014

摘要： An integrated circuit device including an interlayer insulating layer on a substrate, a wire layer on the interlayer insulating layer, and a through-silicon-via (TSV) contact pattern having an end contacting the wire layer and integrally extending from inside of a via hole formed through the interlayer insulating layer and the substrate to outside of the via hole.

摘要翻译： 一种集成电路器件，包括在衬底上的层间绝缘层，层间绝缘层上的导线层和穿过硅通孔（TSV）的接触图案，所述接触图形具有接触所述导线层的端部并且从通孔内部一体地延伸 通过层间绝缘层和基板形成到通孔的外部。

公开(公告)号：US11251144B2

公开(公告)日：2022-02-15

申请号：US16668146

申请日：2019-10-30

申请人： Samsung Electronics Co., Ltd.

发明人： Jeong-gi Jin ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-jin Lee

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H01L25/065

摘要： A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.

公开(公告)号：US10483224B2

公开(公告)日：2019-11-19

申请号：US15791709

申请日：2017-10-24

申请人： Samsung Electronics Co., Ltd.

发明人： Jeong-gi Jin ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-jin Lee

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L25/10

摘要： A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.

公开(公告)号：US20200066666A1

公开(公告)日：2020-02-27

申请号：US16668146

申请日：2019-10-30

申请人： Samsung Electronics Co., Ltd.

发明人： Jeong-gi Jin ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-jin Lee

IPC分类号： H01L23/00 ,  H01L23/31

摘要： A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.

公开(公告)号：US20130175673A1

公开(公告)日：2013-07-11

申请号：US13738728

申请日：2013-01-10

申请人： Samsung Electronics Co., Ltd.

发明人： Jeong-gi Jin ,  Jeong-woo Park ,  Ju-il Choi

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2221/6835 ,  H01L2224/03828 ,  H01L2224/11002 ,  H01L2224/11009 ,  H01L2224/11462 ,  H01L2224/1161 ,  H01L2224/1162 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/13616 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/1369 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/81011 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00014

摘要： An integrated circuit device including an interlayer insulating layer on a substrate, a wire layer on the interlayer insulating layer, and a through-silicon-via (TSV) contact pattern having an end contacting the wire layer and integrally extending from inside of a via hole formed through the interlayer insulating layer and the substrate to outside of the via hole.

摘要翻译： 一种集成电路器件，包括在衬底上的层间绝缘层，层间绝缘层上的导线层和穿过硅通孔（TSV）的接触图案，所述接触图形具有接触所述导线层的端部并且从通孔内部一体地延伸 通过层间绝缘层和基板形成到通孔的外部。