公开(公告)号：US11923362B2

公开(公告)日：2024-03-05

申请号：US18314569

申请日：2023-05-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L21/3086 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US11373909B2

公开(公告)日：2022-06-28

申请号：US16845683

申请日：2020-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min Kim ,  Dong-won Kim ,  Geum-jong Bae

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a device region defined by a trench in the substrate. The semiconductor device includes a plurality of fin-shaped active regions spaced apart from each other in the device region and extending in a first direction. The semiconductor device includes a protruding pattern extending along a bottom surface of the trench. Moreover, an interval between the protruding pattern and the plurality of fin-shaped active regions is greater than an interval between two adjacent ones of the plurality of fin-shaped active regions.

公开(公告)号：US10741676B2

公开(公告)日：2020-08-11

申请号：US16453486

申请日：2019-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-hun Lee ,  Dong-won Kim

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/11 ,  H01L29/06 ,  H01L29/423 ,  G11C11/419 ,  H01L27/146 ,  H01L21/02 ,  H01L29/10 ,  H01L29/78 ,  H01L27/11578

Abstract: A semiconductor device includes a first PMOS transistor, a first NMOS transistor, and a second NMOS transistor connected to an output node of the first PMOS and NMOS transistors. The first PMOS transistor includes first nanowires, first source and drain regions on opposite sides of each first nanowire, and a first gate completely surrounding each first nanowire. The first NMOS transistor includes second nanowires, second source and drain regions on opposite sides of each second nanowire, and a second gate extending from the first gate and completely surrounding each second nanowire. The second NMOS transistor includes third nanowires, third source and drain regions on opposite sides of each third nanowire, and a third gate, separated from the first and second gates, and completely surrounding each third nanowire. A number of third nanowires is greater than that of first nanowires. The first and second gates share respective first and second nanowires.

公开(公告)号：US10396205B2

公开(公告)日：2019-08-27

申请号：US15951385

申请日：2018-04-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mun-hyeon Kim ,  Sung-man Whang ,  Chang-woo Noh ,  Dong-won Kim ,  Han-su Oh

IPC: H01L27/12 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8232

Abstract: An integrated circuit device includes a base burying insulating film covering a lower side wall of a fin-type active region on a substrate, an isolation pattern having a top surface higher than a top surface of the base burying insulating film, and a gate line covering a channel section of the fin-type active region. The gate line has an upper gate covering an upper portion of the channel section and a lower gate protruding from the upper gate toward the substrate and filling a space between a lower side wall of the channel section and an upper side wall of the isolation pattern.

公开(公告)号：US09613821B2

公开(公告)日：2017-04-04

申请号：US14695047

申请日：2015-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yool Kang ,  Dong-won Kim ,  Ju-young Kim ,  Tae-hoon Kim ,  Hye-ji Kim ,  Su-min Park ,  Hyung-rae Lee

IPC: H01L21/308 ,  H01L21/311 ,  H01L21/02 ,  H01L21/027 ,  H01L21/033 ,  H01L21/3213 ,  H01L27/108 ,  H01L21/768

CPC classification number: H01L21/3086 ,  H01L21/0273 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888

Abstract: Provided are a method of forming patterns and a method of manufacturing an integrated circuit device. In the method of forming patterns, a photoresist pattern having a first opening exposing a first region of a target layer is formed. A capping layer is formed at sidewalls of the photoresist pattern defining the first opening. An insoluble region is formed around the first opening by diffusing acid from the capping layer to the inside of the photoresist pattern. A second opening exposing a second region of the target layer is formed by removing a soluble region spaced apart from the first opening, with the insoluble region being interposed therebetween. The target layer is etched using the insoluble region as an etch mask.

公开(公告)号：US20130299771A1

公开(公告)日：2013-11-14

申请号：US13748622

申请日：2013-01-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun-pil Youn ,  Dong-won Kim ,  Taek-sung Kim

IPC: H01L29/78 ,  H01L27/092

CPC classification number: H01L29/78 ,  H01L21/845 ,  H01L27/092 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/785 ,  H01L29/78696 ,  H01L2029/7857

Abstract: A semiconductor device has a semiconductor body including a source region, a channel region, and a drain region, which are sequentially arranged in a longitudinal direction and are doped with the same type of impurity, a gate electrode including metal, and a gate dielectric layer interposed between the semiconductor body and the gate electrode.

Abstract translation: 半导体器件具有包括源区域，沟道区域和漏极区域的半导体本体，其沿纵向依次布置并掺杂相同类型的杂质，包括金属的栅极电极和栅极介电层 插入在半导体本体和栅电极之间。

公开(公告)号：US11302826B2

公开(公告)日：2022-04-12

申请号：US16940682

申请日：2020-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-hun Lee ,  Dong-won Kim

IPC: H01L29/786 ,  H01L27/11 ,  H01L29/06 ,  H01L29/423 ,  G11C11/419 ,  H01L27/146 ,  H01L21/02 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L27/11578

Abstract: A semiconductor device includes a first PMOS transistor, a first NMOS transistor, and a second NMOS transistor connected to an output node of the first PMOS and NMOS transistors. The first PMOS transistor includes first nanowires, first source and drain regions on opposite sides of each first nanowire, and a first gate completely surrounding each first nanowire. The first NMOS transistor includes second nanowires, second source and drain regions on opposite sides of each second nanowire, and a second gate extending from the first gate and completely surrounding each second nanowire. The second NMOS transistor includes third nanowires, third source and drain regions on opposite sides of each third nanowire, and a third gate, separated from the first and second gates, and completely surrounding each third nanowire. A number of third nanowires is greater than that of first nanowires. The first and second gates share respective first and second nanowires.

公开(公告)号：US10658244B2

公开(公告)日：2020-05-19

申请号：US16023621

申请日：2018-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min Kim ,  Dong-won Kim ,  Geum-jong Bae

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a device region defined by a trench in the substrate. The semiconductor device includes a plurality of fin-shaped active regions spaced apart from each other in the device region and extending in a first direction. The semiconductor device includes a protruding pattern extending along a bottom surface of the trench. Moreover, an interval between the protruding pattern and the plurality of fin-shaped active regions is greater than an interval between two adjacent ones of the plurality of fin-shaped active regions.

公开(公告)号：US20200083219A1

公开(公告)日：2020-03-12

申请号：US16358118

申请日：2019-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/308 ,  H01L29/66

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US20190088551A1

公开(公告)日：2019-03-21

申请号：US16023621

申请日：2018-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min Kim ,  Dong-won Kim ,  Geum-jong Bae

IPC: H01L21/8234 ,  H01L21/762

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a device region defined by a trench in the substrate. The semiconductor device includes a plurality of fin-shaped active regions spaced apart from each other in the device region and extending in a first direction. The semiconductor device includes a protruding pattern extending along a bottom surface of the trench. Moreover, an interval between the protruding pattern and the plurality of fin-shaped active regions is greater than an interval between two adjacent ones of the plurality of fin-shaped active regions.