公开(公告)号：US10396205B2

公开(公告)日：2019-08-27

申请号：US15951385

申请日：2018-04-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mun-hyeon Kim ,  Sung-man Whang ,  Chang-woo Noh ,  Dong-won Kim ,  Han-su Oh

IPC: H01L27/12 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8232

Abstract: An integrated circuit device includes a base burying insulating film covering a lower side wall of a fin-type active region on a substrate, an isolation pattern having a top surface higher than a top surface of the base burying insulating film, and a gate line covering a channel section of the fin-type active region. The gate line has an upper gate covering an upper portion of the channel section and a lower gate protruding from the upper gate toward the substrate and filling a space between a lower side wall of the channel section and an upper side wall of the isolation pattern.