公开(公告)号：US10930649B2

公开(公告)日：2021-02-23

申请号：US16358118

申请日：2019-03-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US10566331B1

公开(公告)日：2020-02-18

申请号：US16257913

申请日：2019-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-gil Yang ,  Sang-su Kim ,  Sun-wook Kim ,  Geum-jong Bae ,  Seung-min Song ,  Soo-jin Jeong

IPC: H01L29/78 ,  H01L27/092 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L29/423 ,  H01L21/8238 ,  H01L21/02

Abstract: A semiconductor device includes: a fin-type active area extending in a first direction protruding from a substrate; a plurality of nanosheet stacked structures; a blocking film covering a part of the upper surface and one sidewall of each of a pair of nanosheet stacked structures adjacent to both sides of the fin-type active area among the plurality of nanosheet stacked structures; a gate electrode extending in a second direction intersecting the first direction on the fin-type active area, the gate electrode including a real gate electrode surrounding the plurality of nanosheets and a dummy gate electrode disposed on the blocking film; and a gate dielectric layer between the real gate electrode and the plurality of nanosheets and between the dummy gate electrode and the blocking film.

公开(公告)号：US11923362B2

公开(公告)日：2024-03-05

申请号：US18314569

申请日：2023-05-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L21/3086 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US11676964B2

公开(公告)日：2023-06-13

申请号：US17886530

申请日：2022-08-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-Won Kim ,  Jung-gil Yang

IPC: H01L29/06 ,  H01L27/088 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

CPC classification number: H01L27/0886 ,  H01L21/3086 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US20230282642A1

公开(公告)日：2023-09-07

申请号：US18314569

申请日：2023-05-09

Applicant: SAMSUNG ELECTRONICS CO.,LTD.

Inventor： Myung-gil KANG ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

CPC classification number: H01L27/0886 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/7851 ,  H01L21/823431 ,  H01L29/66795 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/3086 ,  H01L29/66545 ,  H01L21/823468

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US20220384432A1

公开(公告)日：2022-12-01

申请号：US17886530

申请日：2022-08-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US11444081B2

公开(公告)日：2022-09-13

申请号：US17150712

申请日：2021-01-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US20200243395A1

公开(公告)日：2020-07-30

申请号：US16845683

申请日：2020-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min Kim ,  Dong-won Kim ,  Geum-jong Bae

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a device region defined by a trench in the substrate. The semiconductor device includes a plurality of fin-shaped active regions spaced apart from each other in the device region and extending in a first direction. The semiconductor device includes a protruding pattern extending along a bottom surface of the trench. Moreover, an interval between the protruding pattern and the plurality of fin-shaped active regions is greater than an interval between two adjacent ones of the plurality of fin-shaped active regions.

公开(公告)号：US11373909B2

公开(公告)日：2022-06-28

申请号：US16845683

申请日：2020-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min Kim ,  Dong-won Kim ,  Geum-jong Bae

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a device region defined by a trench in the substrate. The semiconductor device includes a plurality of fin-shaped active regions spaced apart from each other in the device region and extending in a first direction. The semiconductor device includes a protruding pattern extending along a bottom surface of the trench. Moreover, an interval between the protruding pattern and the plurality of fin-shaped active regions is greater than an interval between two adjacent ones of the plurality of fin-shaped active regions.

公开(公告)号：US11742411B2

公开(公告)日：2023-08-29

申请号：US17224609

申请日：2021-04-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-woo Noh ,  Myung-gil Kang ,  Ho-jun Kim ,  Geum-jong Bae ,  Dong-il Bae

IPC: H01L21/02 ,  H01L21/762 ,  H01L29/78 ,  H01L29/165 ,  H01L21/768 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/66545 ,  H01L21/02603 ,  H01L21/76224 ,  H01L21/76802 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/42356 ,  H01L29/7846 ,  H01L29/7848

Abstract: A semiconductor device according to an example embodiment includes a substrate extending in first and second directions intersecting with each other; nanowires on the substrate and spaced apart from each other in the second direction; gate electrodes extending in the first direction and spaced apart from each other in the second direction, and surrounding the nanowires to be superimposed vertically with the nanowires; external spacers on the substrate and covering sidewalls of the gate electrodes on the nanowires; and an isolation layer between the gate electrodes and extending in the first direction, wherein an upper surface of the isolation layer is flush with upper surfaces of the gate electrodes.