公开(公告)号：US20150346709A1

公开(公告)日：2015-12-03

申请号：US14718116

申请日：2015-05-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-hoon Han ,  Jai-hyung Won ,  Do-hyung Kim ,  Sung-hyup Kim ,  Ho-jun Kim

IPC: G05B19/401 ,  H01L21/67

CPC classification number: G05B19/41875 ,  G05B2219/31443 ,  G05B2219/45031 ,  G05B2219/50139 ,  Y02P90/20 ,  Y02P90/22

Abstract: A semiconductor process management system is provided. The semiconductor process management system includes a communicator that receives a process recipe from one or more process apparatuses and receives a measured value for each sampling point from one or more measuring apparatus, and a first determination unit that establishes a mutual influence model between the process recipe and the measured value for each sampling point based on the process recipe and the measured value for each sampling point.

Abstract translation: 提供半导体工艺管理系统。 半导体处理管理系统包括从一个或多个处理装置接收处理配方并从一个或多个测量装置接收每个采样点的测量值的通信器，以及在处理配方之间建立相互影响模型的第一确定单元 基于每个采样点的过程配方和测量值对每个采样点的测量值。

公开(公告)号：US11742411B2

公开(公告)日：2023-08-29

申请号：US17224609

申请日：2021-04-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-woo Noh ,  Myung-gil Kang ,  Ho-jun Kim ,  Geum-jong Bae ,  Dong-il Bae

IPC: H01L21/02 ,  H01L21/762 ,  H01L29/78 ,  H01L29/165 ,  H01L21/768 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/66545 ,  H01L21/02603 ,  H01L21/76224 ,  H01L21/76802 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/42356 ,  H01L29/7846 ,  H01L29/7848

Abstract: A semiconductor device according to an example embodiment includes a substrate extending in first and second directions intersecting with each other; nanowires on the substrate and spaced apart from each other in the second direction; gate electrodes extending in the first direction and spaced apart from each other in the second direction, and surrounding the nanowires to be superimposed vertically with the nanowires; external spacers on the substrate and covering sidewalls of the gate electrodes on the nanowires; and an isolation layer between the gate electrodes and extending in the first direction, wherein an upper surface of the isolation layer is flush with upper surfaces of the gate electrodes.

公开(公告)号：US10978299B2

公开(公告)日：2021-04-13

申请号：US16361914

申请日：2019-03-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-woo Noh ,  Myung-gil Kang ,  Ho-jun Kim ,  Geum-jong Bae ,  Dong-il Bae

IPC: H01L21/02 ,  H01L21/762 ,  H01L21/768 ,  H01L29/165 ,  H01L29/78 ,  H01L29/06 ,  H01L29/423

Abstract: A semiconductor device according to an example embodiment includes a substrate extending in first and second directions intersecting with each other; nanowires on the substrate and spaced apart from each other in the second direction; gate electrodes extending in the first direction and spaced apart from each other in the second direction, and surrounding the nanowires to be superimposed vertically with the nanowires; external spacers on the substrate and covering sidewalls of the gate electrodes on the nanowires; and an isolation layer between the gate electrodes and extending in the first direction, wherein an upper surface of the isolation layer is flush with upper surfaces of the gate electrodes.

公开(公告)号：US09791855B2

公开(公告)日：2017-10-17

申请号：US14718116

申请日：2015-05-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-hoon Han ,  Jai-hyung Won ,  Do-hyung Kim ,  Sung-hyup Kim ,  Ho-jun Kim

IPC: G05B19/401 ,  H01L21/67 ,  G05B19/418

CPC classification number: G05B19/41875 ,  G05B2219/31443 ,  G05B2219/45031 ,  G05B2219/50139 ,  Y02P90/20 ,  Y02P90/22

Abstract: A semiconductor process management system is provided. The semiconductor process management system includes a communicator that receives a process recipe from one or more process apparatuses and receives a measured value for each sampling point from one or more measuring apparatus, and a first determination unit that establishes a mutual influence model between the process recipe and the measured value for each sampling point based on the process recipe and the measured value for each sampling point.