公开(公告)号：US10020273B2

公开(公告)日：2018-07-10

申请号：US15345614

申请日：2016-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-il Choi ,  Hyoju Kim ,  Byunglyul Park ,  Yeun-Sang Park ,  Jubin Seo ,  Atsushi Fujisaki

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05166 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13025 ,  H01L2224/13026 ,  H01L2224/13076 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13211 ,  H01L2224/13239 ,  H01L2224/16145 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/206 ,  H01L2924/0105 ,  H01L2924/01327 ,  H01L2224/1146 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/01029

Abstract: According to aspects provided herein, a semiconductor device may include a bump providing improved reliability and reduced size. In some aspects, a conductive pad may be formed on a substrate, and a conductive support layer, which may be a pillar, may be formed on the conductive pad. An intermetallic compound (IMC) layer may be formed on the conductive support layer, and a solder layer may be formed on the IMC layer. In some aspects, the conductive support layer may be of a smaller width than the IMC layer. In some aspects, the conductive support layer may have side surfaces which are wider at the solder side than at the conductive pad side. In some aspects, other layers may be formed, such as a seed layer between the conductive pad and the conductive support layer, or a barrier layer between the conductive support layer and the IMC layer.

公开(公告)号：US20210384136A1

公开(公告)日：2021-12-09

申请号：US17406517

申请日：2021-08-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changbo LEE ,  Joonseok Oh ,  Byunglyul Park

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: This invention provides a fan-out semiconductor package ,the fan-out semiconductor package includes a frame including one or more insulating layers and having a penetration portion, a semiconductor chip disposed in the penetration portion of the frame and having a connection pad, a connection structure disposed on a lower side of the frame and the semiconductor chip and including a redistribution layer, a first encapsulant covering a back surface of the semiconductor chip and a first region of a top surface of an uppermost insulating layer among the one or more insulating layers of the frame and extending between a sidewall of the penetration portion and a side surface of the semiconductor chip, and a second encapsulant covering a second region of the top surface of the uppermost insulating layer among the one or more insulating layers of the frame and being in contact with a side surface of the first encapsulant on the frame.

公开(公告)号：USD859390S1

公开(公告)日：2019-09-10

申请号：US29614543

申请日：2017-08-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Designer： Byunglyul Park ,  Kangho Park ,  Bora Han ,  Sehan Kim ,  Yoonha Paick ,  Bongkyu Song ,  Ilwoo Lee ,  Jihye Lee

公开(公告)号：US11694965B2

公开(公告)日：2023-07-04

申请号：US17406517

申请日：2021-08-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changbo Lee ,  Joonseok Oh ,  Byunglyul Park

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/214

Abstract: This invention provides a fan-out semiconductor package, the fan-out semiconductor package includes a frame including one or more insulating layers and having a penetration portion, a semiconductor chip disposed in the penetration portion of the frame and having a connection pad, a connection structure disposed on a lower side of the frame and the semiconductor chip and including a redistribution layer, a first encapsulant covering a back surface of the semiconductor chip and a first region of a top surface of an uppermost insulating layer among the one or more insulating layers of the frame and extending between a sidewall of the penetration portion and a side surface of the semiconductor chip, and a second encapsulant covering a second region of the top surface of the uppermost insulating layer among the one or more insulating layers of the frame and being in contact with a side surface of the first encapsulant on the frame.

公开(公告)号：US09799619B2

公开(公告)日：2017-10-24

申请号：US15209298

申请日：2016-07-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeonggi Jin ,  Kyu-Ha Lee ,  Jinho Chun ,  Byunglyul Park ,  Jinho An

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/11 ,  H01L21/78 ,  H01L25/00

CPC classification number: H01L24/09 ,  H01L21/4857 ,  H01L21/78 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/525 ,  H01L24/05 ,  H01L24/08 ,  H01L25/117 ,  H01L25/50 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/02351 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/06181 ,  H01L2224/08059 ,  H01L2224/08111 ,  H01L2224/13022 ,  H01L2224/17181 ,  H01L2225/0652 ,  H01L2225/06541

Abstract: An electronic device includes an upper insulating layer on a substrate. An upper redistribution structure is embedded in the upper insulating layer. The upper redistribution structure includes an upper contact portion, an upper pad portion, and an upper line portion between the upper contact portion and the upper pad portion. A passivation layer is on the upper insulating layer and the upper redistribution structure. An upper opening is configured to pass through the passivation layer and expose the upper pad portion. Vertical thicknesses of the upper pad portion and the upper contact portion are greater than a vertical thickness of the upper line portion.

公开(公告)号：US11121090B2

公开(公告)日：2021-09-14

申请号：US16683960

申请日：2019-11-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changbo Lee ,  Joonseok Oh ,  Byunglyul Park

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: This invention provides a fan-out semiconductor package, the fan-out semiconductor package includes a frame including one or more insulating layers and having a penetration portion, a semiconductor chip disposed in the penetration portion of the frame and having a connection pad, a connection structure disposed on a lower side of the frame and the semiconductor chip and including a redistribution layer, a first encapsulant covering a back surface of the semiconductor chip and a first region of a top surface of an uppermost insulating layer among the one or more insulating layers of the frame and extending between a sidewall of the penetration portion and a side surface of the semiconductor chip, and a second encapsulant covering a second region of the top surface of the uppermost insulating layer among the one or more insulating layers of the frame and being in contact with a side surface of the first encapsulant on the frame.

公开(公告)号：US09806004B2

公开(公告)日：2017-10-31

申请号：US14953857

申请日：2015-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jin Lee ,  Byunglyul Park ,  Jisoon Park ,  Jinho An

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/92 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05018 ,  H01L2224/05019 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05556 ,  H01L2224/05559 ,  H01L2224/05564 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/0601 ,  H01L2224/06051 ,  H01L2224/06181 ,  H01L2224/16146 ,  H01L2224/92 ,  H01L2924/13091 ,  H01L2924/381 ,  H01L2924/00012 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01028 ,  H01L2924/01074 ,  H01L2924/00014 ,  H01L2224/03444 ,  H01L2224/0346 ,  H01L2224/03 ,  H01L21/304

Abstract: Semiconductor devices are provided. The semiconductor devices include a substrate, a first interlayer insulating layer disposed on a front-side of the substrate, a TSV structure passing through the first interlayer insulating layer and the substrate. The TSV structure has a bottom end protruding from a back-side of the substrate, a back-side insulating layer and a back-side passivation layer disposed on the back-side of the substrate, and a bumping pad buried in the back-side insulating layer and the back-side passivation layer and disposed on the bottom end of the TSV structure. The bottom end of the TSV structure protrudes into the back-side bumping pad, and top surfaces of the back-side passivation layer and the back-side bumping pad are coplanar.

公开(公告)号：US20170053882A1

公开(公告)日：2017-02-23

申请号：US15209298

申请日：2016-07-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeonggi Jin ,  Kyu-Ha Lee ,  Jinho Chun ,  Byunglyul Park ,  Jinho An

IPC: H01L23/00 ,  H01L25/00 ,  H01L21/78 ,  H01L23/31 ,  H01L25/11

CPC classification number: H01L24/09 ,  H01L21/4857 ,  H01L21/78 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/525 ,  H01L24/05 ,  H01L24/08 ,  H01L25/117 ,  H01L25/50 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/02351 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/06181 ,  H01L2224/08059 ,  H01L2224/08111 ,  H01L2224/13022 ,  H01L2224/17181 ,  H01L2225/0652 ,  H01L2225/06541

Abstract: An electronic device includes an upper insulating layer on a substrate. An upper redistribution structure is embedded in the upper insulating layer. The upper redistribution structure includes an upper contact portion, an upper pad portion, and an upper line portion between the upper contact portion and the upper pad portion. A passivation layer is on the upper insulating layer and the upper redistribution structure. An upper opening is configured to pass through the passivation layer and expose the upper pad portion. Vertical thicknesses of the upper pad portion and the upper contact portion are greater than a vertical thickness of the upper line portion.

Abstract translation: 电子器件包括在衬底上的上绝缘层。 上部再分配结构嵌入在上绝缘层中。 上再分配结构包括上接触部分，上焊盘部分和上接触部分和上焊盘部分之间的上线部分。 钝化层位于上绝缘层和上再分布结构上。 上开口构造成穿过钝化层并暴露上焊盘部分。 上部焊盘部分和上部接触部分的垂直厚度大于上部分部分的垂直厚度。