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公开(公告)号:US20250017017A1
公开(公告)日:2025-01-09
申请号:US18439308
申请日:2024-02-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hoseok Heo , Kyunghun Kim , Sunho Kim , Hyungyung Kim , Minhyun Lee , Seokhoon Choi , Seungdam Hyun
IPC: H10B43/35 , H01L29/423
Abstract: A vertical NAND flash memory device and an electronic apparatus including the same are provided. The vertical NAND flash memory device includes a plurality of cell arrays. Each of the plurality of cell arrays includes a channel layer, a charge trap layer, and a plurality of gate electrodes provided on the charge trap layer. The charge trap layer includes a matrix including amorphous metal oxynitride and nanocrystals dispersed in the matrix and including nitride having semiconductor characteristics.
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公开(公告)号:US20240221832A1
公开(公告)日:2024-07-04
申请号:US18328192
申请日:2023-06-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seyun KIM , Kyunghun Kim , Sunho Kim , Hyungyung Kim , Seungyeul Yang , Gukhyon Yon , Minhyun Lee , Joonsuk Lee , Seokhoon Choi , Hoseok Heo
CPC classification number: G11C16/0483 , H01L29/1606 , H01L29/18 , H10B43/10 , H10B43/27 , H10B43/35
Abstract: Provided is a nonvolatile memory device. The nonvolatile memory device includes: a channel layer; a plurality of gate electrodes and a plurality of insulating layers being spaced apart from the channel layer and being alternately arranged; a charge trap layer between the channel layer and a gate electrode, and a charge tunneling layer between the channel layer and the charge trap layer.
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公开(公告)号:US20220068609A1
公开(公告)日:2022-03-03
申请号:US17213017
申请日:2021-03-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joohee Kim , Hyunjung Lee , Sungwook Jung , Sunho Kim , Sungjin Kim , Jungwook Kim , Hosun Yoo
IPC: H01J37/32
Abstract: A fastening automation apparatus for an upper electrode of an etching facility includes a ring, and a plurality of fastening modules movably secured to the ring and configured to be movable in a radial direction on the ring. Each fastening module includes a first frame that is movable in a radial direction on the ring, a driving source installed below the first frame, a driving shaft that transmits a driving force from the driving source, a power transmission unit connected to the driving shaft, and a fastening bit connected to the power transmission unit and configured to be rotated. The plurality of fastening modules are configured to operate simultaneously to install the upper electrode in the etching facility.
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公开(公告)号:US12119210B2
公开(公告)日:2024-10-15
申请号:US17213017
申请日:2021-03-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joohee Kim , Hyunjung Lee , Sungwook Jung , Sunho Kim , Sungjin Kim , Jungwook Kim , Hosun Yoo
IPC: H01J37/32
CPC classification number: H01J37/32532 , H01J37/32642
Abstract: A fastening automation apparatus for an upper electrode of an etching facility includes a ring, and a plurality of fastening modules movably secured to the ring and configured to be movable in a radial direction on the ring. Each fastening module includes a first frame that is movable in a radial direction on the ring, a driving source installed below the first frame, a driving shaft that transmits a driving force from the driving source, a power transmission unit connected to the driving shaft, and a fastening bit connected to the power transmission unit and configured to be rotated. The plurality of fastening modules are configured to operate simultaneously to install the upper electrode in the etching facility.
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公开(公告)号:US20240065000A1
公开(公告)日:2024-02-22
申请号:US18169436
申请日:2023-02-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yumin Kim , Jooheon Kang , Sunho Kim , Seyun Kim , Garam Park , Hyunjae Song , Dongho Ahn , Seungyeul Yang , Myunghun Woo , Jinwoo Lee
CPC classification number: H10B63/34 , G11C13/0007 , G11C13/003 , H10B63/845 , G06N3/063 , G11C2213/71 , G11C2213/75 , G11C2213/79
Abstract: Provided are a nonvolatile memory device and an operating method thereof. The nonvolatile memory device may include a conductive pillar, a resistance change layer surrounding a side surface of the conductive pillar, a semiconductor layer surrounding a side surface of the resistance change layer, a gate insulating layer surrounding a side surface of the semiconductor layer, and a plurality of insulating patterns and a plurality of gate electrodes alternately arranged along a surface of the gate insulating layer. The plurality of insulating patterns and the plurality of gate electrodes may surround a side surface of the gate insulating layer.
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公开(公告)号:USD1045890S1
公开(公告)日:2024-10-08
申请号:US29829980
申请日:2022-03-09
Applicant: Samsung Electronics Co., Ltd.
Designer: Sunho Kim , Kyunghwa Seo , Yeongjune Choi
Abstract: FIG. 1 is a front view of the first image in a sequence for a display screen or portion thereof with transitional graphical user interface showing our new design;
FIG. 2 is the second image thereof;
FIG. 3 is the third image thereof;
FIG. 4 is the fourth image thereof;
FIG. 5 is an enlarged view of a portion of FIG. 1, shown separately for clarity of illustration;
FIG. 6 is an enlarged view of a portion of FIG. 2, shown separately for clarity of illustration;
FIG. 7 is an enlarged view of a portion of FIG. 3, shown separately for clarity of illustration; and,
FIG. 8 is an enlarged view of a portion of FIG. 4, shown separately for clarity of illustration.
The outer perimeter shown in broken lines in the figures illustrates a display screen or portion thereof and forms no part of the claimed design. The remaining broken lines in the figures illustrate portions of the graphical user interface that form no part of the claimed design.
The appearance of the transitional image sequentially transitions between the images shown in FIGS. 1-4. The process or period in which one image transitions to another image forms no part of the claimed design.
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