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公开(公告)号:US09699916B2
公开(公告)日:2017-07-04
申请号:US14707295
申请日:2015-05-08
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi
IPC: H05K1/00 , H05K1/09 , H05K3/28 , H05K1/02 , H05K3/46 , H05K3/18 , H05K3/24 , H05K3/38 , H05K3/40
CPC classification number: H05K3/28 , H05K1/0284 , H05K3/188 , H05K3/243 , H05K3/244 , H05K3/282 , H05K3/381 , H05K3/383 , H05K3/4007 , H05K3/46 , H05K3/4602 , H05K3/4661 , H05K2201/09409 , H05K2201/09536 , H05K2201/0959 , H05K2201/10204 , H05K2203/0307 , H05K2203/0574 , H05K2203/058 , H05K2203/0597 , H05K2203/0766 , Y10T29/49156
Abstract: A method of manufacturing a wiring substrate according to the present invention includes a step of forming a wiring layer including connection terminals on a first insulating layer; a step of forming a second insulating layer on the wiring layer and on the first insulating layer; a step of forming electrically insulative dummy portions separated from the wiring layer on the first insulating layer through patterning of the second insulating layer; a step of forming a third insulating layer on the wiring layer, on the dummy portions, and on the first insulating layer; and a step of forming openings in the third insulating layer for exposing the connection terminals in such a manner that upper end portions of the connection terminals protrude from the third insulating layer, and lower end portions of the connection terminals are embedded in the third insulating layer.
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公开(公告)号:US09420703B2
公开(公告)日:2016-08-16
申请号:US14237065
申请日:2013-05-27
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi , Makoto Nagai , Tatsuya Ito , Seiji Mori , Makoto Wakazono , Tomohiro Nishida
IPC: H05K1/00 , H05K3/40 , H01L23/498 , H01L21/48 , H01L23/00 , H05K3/34 , H05K1/02 , H05K1/03 , H05K3/46 , H05K3/28
CPC classification number: H05K3/4007 , H01L21/4846 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L24/81 , H01L2224/10175 , H01L2224/1134 , H01L2224/1146 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/8114 , H01L2224/81411 , H01L2224/81444 , H01L2224/81455 , H01L2224/81464 , H01L2224/81815 , H01L2924/12042 , H01L2924/1517 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/381 , H01L2924/3841 , H05K1/0298 , H05K1/0366 , H05K3/28 , H05K3/3452 , H05K3/4661 , H05K3/4688 , H05K2201/09845 , H05K2201/09881 , H05K2201/10674 , H01L2924/00015 , H01L2924/00014 , H01L2924/014 , H01L2924/00
Abstract: To provide a wiring board in which wiring conductors are securely protected by a precise and rigid dam portion formed on an outermost layer of a laminate and that is excellent in connection reliability with a semiconductor chip. A laminate that configures this wiring board includes multiple connection terminal portions and wiring conductors as a conductor layer of the outermost layer. The wiring conductors are arranged at predetermined positions, passing through between multiple connection terminal portions for flip-chip mounting a semiconductor chip. A resin insulating layer of the outermost layer of the laminate has a dam portion and a reinforcement portion. The dam portion covers the wiring conductors. The reinforcement portion is formed, between the wiring conductor and the connection terminal portion that is adjacent to the wiring conductor, lower than a height of the dam portion. The reinforcement portion is concatenated with a side surface of the dam portion.
Abstract translation: 为了提供布线基板,其中布线导体被形成在层压体的最外层上的精确且刚性的坝部可靠地保护,并且与半导体芯片的连接可靠性优异。 构成该布线基板的层叠体具有作为最外层的导体层的多个连接端子部和布线导体。 布线导体布置在预定位置,通过多个连接端子部分之间用于倒装芯片安装半导体芯片。 层叠体的最外层的树脂绝缘层具有阻挡部和加强部。 大坝部分覆盖布线导体。 加强部分形成在布线导体和与布线导体相邻的连接端子部分之间,比坝部的高度低。 加强部分与坝部分的侧表面连接。
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公开(公告)号:US10813217B1
公开(公告)日:2020-10-20
申请号:US16808597
申请日:2020-03-04
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi , Tomoaki Mizutani
Abstract: Disclosed is a wiring board including: an insulating substrate; a plurality of connection terminals arranged on the insulating substrate; and a plurality of non-conductive protruding parts respectively arranged on areas of the insulating substrate except areas on which the plurality of connection terminals are arranged. The non-conductive protruding parts has a height greater than that of the connection terminals.
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公开(公告)号:US10123415B2
公开(公告)日:2018-11-06
申请号:US14416254
申请日:2013-07-29
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi , Seiji Mori , Tatsuya Ito
Abstract: A wiring substrate includes a surface layer having electrical insulation properties and a connection terminal having electrical conduction properties and protruding from the surface layer. The connection terminal includes a base portion, a covering portion and a filling portion. The base portion of the connection terminal is made of an electrically conductive first metal and located adjacent to the surface layer so as to extend through the surface layer and protrude from the surface layer. The covering portion of the connection terminal is made of an electrically conductive second metal having a melting point lower than that of the first metal and located so as to cover the base portion. The filling portion of the connection terminal is made of at least one of the second metal and an alloy containing the first and second metals and located so as to fill a hollow in the base portion.
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公开(公告)号:US12021039B2
公开(公告)日:2024-06-25
申请号:US18183250
申请日:2023-03-14
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi
IPC: H01L23/544 , B32B3/30 , B32B15/20
CPC classification number: H01L23/544 , B32B3/30 , B32B15/20 , B32B2457/08
Abstract: Disclosed is a wiring substrate whose orientation can be easily recognized and which can prevent occurrence of a failure which would otherwise occur after a semiconductor device is mounted on the wiring substrate, or after an electronic component composed of the wiring substrate and the semiconductor device mounted thereon is mounted on a base substrate or the like. The wiring substrate includes a base substrate, and a metallic member disposed on a first face of the base substrate. The metallic member has a shape which is plane symmetric with respect to a plane which extends through a center of the first face and is perpendicular to the first face. A recess is formed, as a partial dent, on one of outer surfaces of the metallic member.
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公开(公告)号:US10905008B2
公开(公告)日:2021-01-26
申请号:US16478164
申请日:2018-05-11
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi , Takuya Hando
Abstract: A wiring board includes: a wiring-board body including a first surface and a second surface opposite to the first surface, and including at least one insulator layer; pads formed at at least one of an internal layer boundary plane and the first surface and the second surface defining a first plane; and via conductors connected to corresponding ones of the pads, and arranged in parallel to extend in a thickness direction of the wiring-board body. Each of first and second ones of the pads adjacent to each other in planar view at the first plane is connected to corresponding ones of the via conductors. The via conductors corresponding to the first pad are arranged differently from the via conductors corresponding to the second pad, in planar view.
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公开(公告)号:US20150208501A1
公开(公告)日:2015-07-23
申请号:US14417751
申请日:2013-05-17
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi , Makoto Nagai , Seiji Mori , Tomohiro Nishida , Makoto Wakazono , Tatsuya Ito
CPC classification number: H05K1/111 , G03F7/038 , G03F7/20 , G03F7/2024 , G03F7/30 , H01L23/49822 , H01L2224/16237 , H05K1/0298 , H05K3/3436 , H05K3/3452 , H05K3/4644 , H05K2201/09409 , H05K2201/09427 , H05K2201/09709 , H05K2201/09845 , H05K2201/099 , H05K2201/10674 , H05K2203/058 , H05K2203/0594 , H05K2203/1476
Abstract: To provide a wiring board excellent in connection reliability with a semiconductor chip. A first buildup layer 31 where resin insulating layers 21 and 22 and a conductor layer 24 are laminated is formed at a substrate main surface 11 side of an organic wiring board 10. The conductor layer 24 for an outermost layer in the first buildup layer 31 includes a plurality of connecting terminal portions 41 for flip-chip mounting a semiconductor chip. The plurality of connecting terminal portions 41 is exposed through an opening portion 43 of a solder resist layer 25. Each connecting terminal portion 41 includes a connection region 51 for a semiconductor chip and a wiring region 52 disposed to extend from the connection region 51 along the planar direction. The solder resist layer 25 includes, within the opening portion 43, a side-surface covering portion 55 that covers the side surface of the connecting terminal portion 41 and a projecting wall portion 56 that is integrally formed with the side-surface covering portion 55 and disposed to project so as to intersect with the connection region 51.
Abstract translation: 提供与半导体芯片的连接可靠性优异的布线板。 在有机布线板10的基板主表面11侧形成有树脂绝缘层21,22和导体层24层叠的第一堆积层31.第一堆积层31中的最外层的导体层24包括 多个用于倒装芯片安装半导体芯片的连接端子部分41。 多个连接端子部分41通过阻焊层25的开口部分43露出。每个连接端子部分41包括用于半导体芯片的连接区域51和从连接区域51延伸的布线区域52 平面方向。 阻焊层25在开口部43内具有覆盖连接端子部41的侧面的侧面覆盖部55和与侧面覆盖部55一体形成的突出壁部56, 被设置为突出以与连接区域51相交。
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公开(公告)号:US10993321B2
公开(公告)日:2021-04-27
申请号:US16504673
申请日:2019-07-08
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi
Abstract: A wiring substrate has a substrate body formed by a single or a plurality of insulating layers and having front and back surfaces located at opposite sides of the substrate body; a plurality of pads formed on at least one of the front surface, the back surface and an inner layer surface that is located between the front and back surfaces, and having a staggered arrangement in plan view; and a plurality of via conductors formed at each of the pads, extending in a thickness direction of the substrate body with the plurality of via conductors being parallel to each other and connecting the pads located on different surfaces. Arrangement, in plan view, of the plurality of via conductors connecting to the pad and arrangement, in plan view, of the plurality of via conductors connecting to an adjacent pad located on the same surface are different from each other.
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公开(公告)号:US20150189752A1
公开(公告)日:2015-07-02
申请号:US14416254
申请日:2013-07-29
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi , Seiji Mori , Tatsuya Ito
CPC classification number: H05K1/119 , H05K1/0326 , H05K1/0346 , H05K1/09 , H05K3/20 , H05K3/3452 , H05K3/3473 , H05K3/4007 , H05K2201/0367 , H05K2201/10674 , H05K2203/04
Abstract: A wiring substrate includes a surface layer having electrical insulation properties and a connection terminal having electrical conduction properties and protruding from the surface layer. The connection terminal includes a base portion, a covering portion and a filling portion. The base portion of the connection terminal is made of an electrically conductive first metal and located adjacent to the surface layer so as to extend through the surface layer and protrude from the surface layer. The covering portion of the connection terminal is made of an electrically conductive second metal having a melting point lower than that of the first metal and located so as to cover the base portion. The filling portion of the connection terminal is made of at least one of the second metal and an alloy containing the first and second metals and located so as to fill a hollow in the base portion.
Abstract translation: 布线基板包括具有电绝缘性的表面层和具有导电特性并从表面层突出的连接端子。 连接端子包括基部,覆盖部和填充部。 连接端子的基部由导电的第一金属制成,并且位于表面层附近,从而延伸穿过表面层并从表面层突出。 连接端子的覆盖部分由具有低于第一金属的熔点的导电的第二金属制成,并且被定位成覆盖基部。 连接端子的填充部分由第二金属和包含第一和第二金属的合金中的至少一个制成,并且被定位成填充基部中的中空部。
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公开(公告)号:US09693453B2
公开(公告)日:2017-06-27
申请号:US14019863
申请日:2013-09-06
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Takahiro Hayashi , Seiji Mori , Tatsuya Ito
CPC classification number: H05K1/092 , H01L21/563 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L2224/13101 , H01L2224/16238 , H01L2224/27013 , H01L2224/73204 , H01L2224/81193 , H01L2224/81411 , H01L2224/81455 , H01L2224/92125 , H05K3/243 , H05K3/28 , H05K3/4007 , H05K2201/0769 , H05K2201/10674 , H05K2201/10977 , H05K2203/0597 , H01L2924/014 , H01L2924/00014
Abstract: A wiring board includes a base layer, a plurality of connection terminals and a surface layer. The base layer is electrically insulative. The plurality of connection terminals are conductive and formed on the base layer. The surface layer is electrically insulative, and fills gaps between the plurality of connection terminals on the base layer. The connection terminals include a base portion made of a conductive first metal and a coating portion made of a conductive second metal that is different from the first metal. The coating portion penetrates the surface layer, and coats the base portion to the base layer.
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