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    Memory device and operation method thereof
    3.
    发明授权
    Memory device and operation method thereof 有权

    公开(公告)号：US11361824B1

    公开(公告)日：2022-06-14

    申请号：US17164976

    申请日：2021-02-02

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Shaw-Hung Ku ,  Cheng-Hsien Cheng ,  Chun-Chang Lu ,  Wen-Jer Tsai

    IPC: G11C16/16 ,  G11C16/08 ,  G11C16/14 ,  G11C16/34 ,  G11C16/30 ,  G11C16/26

    Abstract: Provided are a memory device and an operation method thereof. The memory device includes a plurality of word lines. The operation method comprising: performing a pre-fill operation on the word lines, in a first loop, applying a selected word line voltage on a first selected word line group and applying an unselected word line voltage on a first unselected word line group, and in a second loop, applying the selected word line voltage on a second selected word line group and applying the unselected word line voltage on a second unselected word line group, the first selected word line group being different from the second selected word line group, and the first unselected word line group being different from the second unselected word line group; performing an erase operation on the word lines; and performing a programming operation on the word lines.

    Memory device and method for fabricating the same
    4.
    发明授权
    Memory device and method for fabricating the same 有权

    公开(公告)号：US11018154B2

    公开(公告)日：2021-05-25

    申请号：US16543688

    申请日：2019-08-19

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Chun-Chang Lu ,  Wen-Jer Tsai ,  Guan-Wei Wu ,  Yao-Wen Chang

    IPC: H01L27/11582 ,  H01L29/36 ,  H01L29/10 ,  H01L23/528 ,  H01L21/265 ,  H01L21/02 ,  H01L21/28 ,  H01L29/51

    Abstract: A memory device includes a conductive strip stack structure having conductive strips and insulating layers stacked in a staggered manner and a channel opening passing through the conductive strips and the insulating layer; a memory layer disposed in the channel opening and overlying the conductive strips; a channel layer overlying the memory layer; a semiconductor pad extending upwards from a bottom of the channel opening beyond an upper surface of a bottom conductive strip, in contact with the channel layer, and electrically isolated from the conductive strips; wherein the channel layer includes a first portion having a first doping concentration and a second portion having a second doping concentration disposed on the first portion.

    MEMORY DEVICE AND OPERATING METHOD THEREOF
    5.
    发明申请
    MEMORY DEVICE AND OPERATING METHOD THEREOF 有权

    公开(公告)号：US20210005241A1

    公开(公告)日：2021-01-07

    申请号：US16503631

    申请日：2019-07-05

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Chun-Chang Lu ,  Wen-Jer Tsai

    IPC: G11C11/4074 ,  G11C11/4097 ,  G11C11/4094 ,  G06F13/16

    Abstract: A memory device is provided. The memory device includes a plurality of memory cell blocks and a source voltage generator. Each of the memory cell blocks has at least one memory cell. The source voltage generator is coupled to the plurality of memory cell blocks and configured to cause a source voltage of the memory cell block to be a first voltage according to that a memory cell in each of the memory cell blocks is in a selected state and cause a source voltage of the memory cell block to be a second voltage according to that all memory cells in each of the memory cell blocks are in an unselected state, wherein an absolute value of the first voltage is less than an absolute value of the second voltage. In addition, an operating method of the memory device is also provided.

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