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公开(公告)号：US11303266B2
公开(公告)日：2022-04-12
申请号：US17187414
申请日：2021-02-26
发明人： Hiroaki Ishihara , Satoshi Takaya
摘要： An electronic circuit according to the embodiment of the present invention includes a first circuit, a second circuit electrically insulated from the first circuit, and a transmitter transmitting a signal between the first and the second circuits. The first circuit receives an input signal, generates a first reference signal, and converts frequencies of the input signal and the first reference signal. The transmitter transmits the frequency-converted input signal and first reference signal to the second circuit. The second circuit converts the frequencies of the transmitted input signal first reference signal to obtain a restored input signal and a restored first reference signal, generates a second reference signal, calculates a gain to be adjusted of the restored input signal based on the restored first reference signal and the second reference signal to adjust the gain of the restored input signal.
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公开(公告)号：US12068750B2
公开(公告)日：2024-08-20
申请号：US18180582
申请日：2023-03-08
发明人： Satoshi Takaya , Hiroaki Ishihara
CPC分类号： H03K5/135 , H03K5/00006 , H03K2005/00286
摘要： According to one embodiment, an electronic circuitry includes a clock generation circuit configured to generate a first clock signal; a first conversion circuit configured to convert an input signal into a first signal having a frequency corresponding to the first clock signal based on the first clock signal; a first electromagnetic field coupler configured to transmit the first signal by electromagnetic field coupling; a second electromagnetic field coupler configured to transmit the first clock signal by electromagnetic field coupling; and a second conversion circuit configured to convert the first signal transmitted by the first electromagnetic field coupler into a second signal having a frequency corresponding to the input signal, based on the first clock signal transmitted by the second electromagnetic field coupler.
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公开(公告)号：US10896708B2
公开(公告)日：2021-01-19
申请号：US16741246
申请日：2020-01-13
发明人： Tomoaki Inokuchi , Katsuhiko Koui , Naoharu Shimomura , Hideyuki Sugiyama , Kazutaka Ikegami , Susumu Takeda , Satoshi Takaya , Shinobu Fujita , Hiroaki Yoda
摘要： According to one embodiment, a magnetic memory device includes a conductive member, a first element portion, and a controller. The conductive member includes a first portion, a second portion, and a third portion between the first portion and the second portion. The first element portion includes a first element, a first interconnect, and a first circuit. The first element includes a first magnetic layer, a first counter magnetic layer, and a first nonmagnetic layer. The first counter magnetic layer is provided between the third portion and the first magnetic layer. The first nonmagnetic layer is provided between the first counter magnetic layer and the first magnetic layer. The first interconnect is electrically connected to the first magnetic layer. The first circuit is electrically connected to the first interconnect. The first circuit includes a first switch, a first capacitance element, a first parallel switch, and a first parallel capacitance element.
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公开(公告)号：US20200020374A1
公开(公告)日：2020-01-16
申请号：US16273387
申请日：2019-02-12
发明人： Hiroaki YODA , Satoshi Takaya , Yuichi Ohsawa , Naoharu Shimomura , Katsuhiko Koui , Yushi Kato , Shinobu Fujita
摘要： According to one embodiment, a magnetic memory device includes a first conductive layer, a first stacked body, and a controller. The first conductive layer includes a first region, a second region, and a third region between the first region and the second region. The first stacked body includes a first magnetic layer, a second magnetic layer provided between the third region and the first magnetic layer in a first direction crossing a second direction, and a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. The second direction is from the first region toward the second region. The controller electrically is connected to the first region, the second region, and the first magnetic layer. The controller performs at least first to third operations. In the operations, the controller sets the first stacked body to first to third resistance state.
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公开(公告)号：US10460784B2
公开(公告)日：2019-10-29
申请号：US16118880
申请日：2018-08-31
摘要： According to one embodiment, a magnetic memory includes: a memory cell including a first magnetoresistive effect element; a reference circuit including a second magnetoresistive effect element having a first resistance state and a third magnetoresistive effect element having a second resistance state; and a read circuit configured to read data in the memory cell based on a first signal based on an output from the memory cell and a second signal based on an output from the reference circuit. At a time of reading of the data, a first voltage is applied to the first magnetoresistive effect element, and a second voltage higher than the first voltage is applied to the second magnetoresistive effect element and the third magnetoresistive effect element.
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公开(公告)号：US10459692B2
公开(公告)日：2019-10-29
申请号：US15263972
申请日：2016-09-13
摘要： According to one embodiment, a random number generator includes a first circuit which outputs a second oscillation signal having a predetermined duty ratio on the basis of a first oscillation signal, a second circuit which latches values on the basis of the second oscillation signal and a clock having a frequency lower than a frequency of the second oscillation signal, a third circuit which outputs a control signal on the basis of the values, and a fourth circuit which controls the first circuit on the basis of the control signal.
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公开(公告)号：US11152928B2
公开(公告)日：2021-10-19
申请号：US16814752
申请日：2020-03-10
发明人： Satoshi Takaya , Hiroaki Ishihara
IPC分类号： H03K5/00 , H03K5/133 , H01L23/522 , G01R19/252 , H01L23/66
摘要： An electronic circuit according to an embodiment includes a clock generator, a delay element, a first electromagnetic coupler, a first frequency converter, a second electromagnetic coupler, a second frequency converter, a controller and an output device. The clock generator is configured to generate a first clock signal. The delay element is configured to output a second clock signal which has a phase delayed with respect to the first clock signal. The first electromagnetic coupler is configured to transmit one of the first and second clock signals by electromagnetic coupling. The first frequency converter is driven by the one of the first and second clock signals transmitted from the first electromagnetic coupler and is configured to convert a first input signal to a first signal with a first frequency corresponding to the one of the first and second clock signals.
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公开(公告)号：US10853721B2
公开(公告)日：2020-12-01
申请号：US15685042
申请日：2017-08-24
摘要： According to an embodiment, a multiplier accumulator includes a controller, a high-order multiplier, a high-order accumulator, a low-order multiplier, and an output unit. The controller is configured to designate each digit within a range of the most significant digit in a coefficient for an input value to a stop digit as a target digit. The high-order multiplier is configured to calculate a high-order multiplication value by multiplying the input value, and a value and a weight of the target digit. The high-order accumulator is configured to calculate a high-order accumulation value by accumulatively adding the high-order multiplication values for input values. The low-order multiplier is configured to calculate a low-order multiplication value by multiplying an input value and a value of a digit smaller than the stop digit. The output unit is configured to output a value determined based on whether the high-order accumulation value exceeds a boundary value.
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9.发明授权公开(公告)号：US10748595B2
公开(公告)日：2020-08-18
申请号：US16122915
申请日：2018-09-06
发明人： Satoshi Takaya , Kazutaka Ikegami , Shinobu Fujita
摘要： According to one embodiment, a magnetic memory includes: a memory area; a first memory unit disposed in the memory area and including h first magnetoresistive effect elements arrayed on a first conductive layer; and a first circuit configured to receive i-bit first data, convert the first data into j-bit (j=h) second data, and write the second data in the first memory unit. The second data includes m first values and (j−m) second values, and m and j have a relationship given by “j/2−1≤m≤j/2+1”.
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公开(公告)号：US20190295621A1
公开(公告)日：2019-09-26
申请号：US16118880
申请日：2018-08-31
摘要： According to one embodiment, a magnetic memory includes: a memory cell including a first magnetoresistive effect element; a reference circuit including a second magnetoresistive effect element having a first resistance state and a third magnetoresistive effect element having a second resistance state; and a read circuit configured to read data in the memory cell based on a first signal based on an output from the memory cell and a second signal based on an output from the reference circuit. At a time of reading of the data, a first voltage is applied to the first magnetoresistive effect element, and a second voltage higher than the first voltage is applied to the second magnetoresistive effect element and the third magnetoresistive effect element.
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