SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    半导体器件及制造半导体器件的方法

    公开(公告)号:US20170047322A1

    公开(公告)日:2017-02-16

    申请号:US15337405

    申请日:2016-10-28

    摘要: A semiconductor device, including a semiconductor substrate, a plurality of trenches formed on a front surface of the semiconductor substrate, a plurality of gate electrodes formed in the trenches, a base region and an anode region formed between adjacent trenches respectively in first and second element regions of the semiconductor substrate, a plurality of emitter regions and contact regions selectively formed in the base region, an interlayer insulating film covering the gate electrodes, first and second contact holes penetrating the interlayer insulating film, a plurality of contact plugs embedded in the first contact holes, a first electrode contacting the contact plugs and contacting the anode region via the second contact hole, a collector region and a cathode region formed on a back surface of the semiconductor substrate respectively in the first and second element regions, and a second electrode contacting the collector region and the cathode region.

    摘要翻译: 一种半导体器件,包括半导体衬底,形成在半导体衬底的前表面上的多个沟槽,形成在沟槽中的多个栅极电极,分别形成在第一和第二元件中的相邻沟槽之间的基极区域和阳极区域 半导体衬底的区域,选择性地形成在基极区域中的多个发射极区域和接触区域,覆盖栅电极的层间绝缘膜,穿过层间绝缘膜的第一和第二接触孔,嵌入第一 接触孔,接触接触塞并经由第二接触孔接触阳极区域的第一电极,分别形成在第一和第二元件区域中的半导体衬底的背面上的集电极区域和阴极区域,以及第二电极 使集电极区域和阴极区域接触。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20160211257A1

    公开(公告)日:2016-07-21

    申请号:US14960274

    申请日:2015-12-04

    发明人: Souichi YOSHIDA

    摘要: In an IGBT portion, a first gate electrode is provided in a first trench via a first gate insulating film. A thickness of a first gate insulating film lower portion is thicker than a thickness of a first gate insulating film upper portion, whereby a width of a mesa portion between adjacent first trenches is narrower at a portion of a collector side than at an emitter side. In a diode portion, a second gate electrode is provided inside a second trench via second gate insulating film. A width of the second trench is uniform along a depth direction or narrows from the emitter side toward the collector side. Widths of the second trench are narrower than a sum of a width of the first trench lower portion and the thickness of the first gate insulating film lower portion of both side walls of the first trench lower portion.

    摘要翻译: 在IGBT部分中,第一栅极经由第一栅极绝缘膜设置在第一沟槽中。 第一栅极绝缘膜下部的厚度比第一栅极绝缘膜上部的厚度厚,由此相邻的第一沟槽之间的台面部分的宽度在集电极侧的部分比在发射极侧的部分窄。 在二极管部分中,第二栅电极经由第二栅绝缘膜设置在第二沟槽内。 第二沟槽的宽度沿着深度方向是均匀的,或者从发射极侧向集电极侧变窄。 第二沟槽的宽度比第一沟槽下部的宽度和第一沟槽下部的两个侧壁的第一栅极绝缘膜下部的厚度的和窄。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20160043073A1

    公开(公告)日:2016-02-11

    申请号:US14882427

    申请日:2015-10-13

    摘要: An IGBT is disposed in an IGBT portion, and an FWD is disposed in an FWD portion. A p-type base region and an n−-type drift region are alternately exposed in a trench longitudinal direction in a substrate front surface in a mesa portion between neighboring trenches in the IGBT portion. A p-type anode region and the n−-type drift region are alternately exposed in the trench longitudinal direction in the substrate front surface in a mesa portion in the FWD portion, and a repetitive structure is formed with a portion of the n−-type drift region sandwiched between p-type anode regions and one p-type anode region in contact with the portion as one unit region. The proportion occupied by the p-type anode region in one unit region (an anode ratio) (α) is 50% to 100%.

    摘要翻译: IGBT配置在IGBT部,FWD配置在FWD部。 在IGBT部分的相邻沟槽之间的台面部分的衬底前表面中,在沟槽纵向上交替地露出p型基极区域和n型漂移区域。 p型阳极区域和n型漂移区域在FWD部分的台面部分中的衬底前表面中在沟槽纵向方向上交替暴露,并且重复结构形成有n- 类型漂移区域夹在p型阳极区域和一个p型阳极区域之间,该区域与作为一个单位区域的部分接触。 一个单位区域(阳极比)(α)中的p型阳极区域所占的比例为50%〜100%。

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
    半导体器件和半导体器件制造方法

    公开(公告)号:US20140070270A1

    公开(公告)日:2014-03-13

    申请号:US14025321

    申请日:2013-09-12

    IPC分类号: H01L29/739 H01L29/66

    摘要: IGBT and diode are formed with optimal electrical characteristics on the same semiconductor substrate. IGBT region and FWD region are provided on the same semiconductor substrate. There are a plurality of trenches at predetermined intervals in the front surface of an n− type semiconductor substrate, and P-type channel regions at predetermined intervals in the longitudinal direction of the trench between neighboring trenches, thereby configuring a MOS gate. The p-type channel region and n− type drift region are alternately disposed in longitudinal direction of the trench in the IGBT region. The p-type channel region and a p− type spacer region are alternately disposed in the longitudinal direction of the trench in the FWD region. Pitch in longitudinal direction of the trench of p-type channel region in the IGBT region is shorter than pitch in longitudinal direction of the trench of p-type channel region in the FWD region.

    摘要翻译: IGBT和二极管在相同的半导体衬底上形成最佳的电气特性。 IGBT区域和FWD区域设置在同一半导体衬底上。 在n型半导体衬底的前表面中以预定间隔存在多个沟槽,并且在相邻沟槽之间的沟槽的纵向方向上以预定间隔设置P型沟道区,从而构成MOS栅极。 p型沟道区域和n型漂移区域在IGBT区域的沟槽的纵向方向上交替设置。 p型沟道区域和p型间隔区域在FWD区域中的沟槽的纵向交替地设置。 IGBT区域中p型沟道区域的沟槽的纵向方向的间距小于FWD区域中p型沟道区域的沟槽的纵向方向的间距。