公开(公告)号：US20180047725A1

公开(公告)日：2018-02-15

申请号：US15791760

申请日：2017-10-24

申请人： FUJI ELECTRIC CO., LTD. ,  DENSO CORPORATION

发明人： Souichi YOSHIDA ,  Masaki TAMURA ,  Kenji KOUNO ,  Hiromitsu TANABE

IPC分类号： H01L27/07 ,  H01L29/08 ,  H01L29/06 ,  H01L21/8249

CPC分类号： H01L27/0716 ,  H01L21/8249 ,  H01L27/0727 ,  H01L28/20 ,  H01L29/0696 ,  H01L29/083 ,  H01L29/0834 ,  H01L29/32 ,  H01L29/407 ,  H01L29/7397 ,  H01L29/8611 ,  H01L29/8613

摘要： On a front surface side of an n− semiconductor substrate, an emitter electrode and trench gates each including a p base layer, a trench, a gate oxide film and a gate electrode are provided in an IGBT region and a FWD region. Among p base layers each between adjacent trenches, p base layers having an n+ emitter region are the IGBT emitter region and the p base layers not having the n+ emitter region are the FWD anode region. A lateral width of an n+ cathode region is narrower than a lateral width of the FWD anode region. A difference of a lateral width of the FWD anode region and a lateral width of the n+ cathode region is 50 μm or more. Thus, a semiconductor device may be provided that reduces the forward voltage drop while suppressing waveform oscillation during reverse recovery and having soft recover characteristics.

公开(公告)号：US20170373141A1

公开(公告)日：2017-12-28

申请号：US15686216

申请日：2017-08-25

申请人： FUJI ELECTRIC CO., LTD. ,  DENSO CORPORATION

发明人： Souichi YOSHIDA ,  Seiji NOGUCHI ,  Kenji KOUNO ,  Hiromitsu TANABE

IPC分类号： H01L29/06 ,  H01L29/739 ,  H01L29/66 ,  H01L29/40 ,  H01L29/167 ,  H01L29/10 ,  H01L29/08 ,  H01L27/06 ,  H01L21/324 ,  H01L21/265 ,  H01L21/225 ,  H01L29/861 ,  H01L21/22

摘要： A method of manufacturing a semiconductor device having an insulated gate bipolar transistor portion and a freewheeling diode portion. The method includes introducing an impurity to a rear surface of a semiconductor substrate, performing first heat treating to activate the impurity to form a field stop layer, performing a first irradiation to irradiate light ions from the rear surface of semiconductor substrate to form, in the semiconductor substrate, a first low-lifetime region, performing a second irradiation to irradiate the light ions from the rear surface of the semiconductor substrate to form, in the field stop layer, a second low-lifetime region, and performing second heat treating to reduce a density of defects generated in the field stop layer when the second irradiation is performed. Each of the first and second low-lifetime regions has a carrier lifetime thereof shorter than that of any region of the semiconductor device other than the first and second low-lifetime regions.

公开(公告)号：US20220140121A1

公开(公告)日：2022-05-05

申请号：US17578996

申请日：2022-01-19

申请人： FUJI ELECTRIC CO., LTD. ,  DENSO CORPORATION

发明人： Hiroshi MIYATA ,  Seiji NOGUCHI ,  Souichi YOSHIDA ,  Hiromitsu TANABE ,  Kenji KOUNO ,  Yasushi OKURA

IPC分类号： H01L29/739 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/423 ,  H01L21/768 ,  H01L29/40 ,  H01L29/06 ,  H01L29/861 ,  H01L29/417 ,  H01L29/45

摘要： A plug electrode is subject to etch back to remain in a contact hole and expose a barrier metal on a top surface of an interlayer insulating film. The barrier metal is subject to etch back, exposing the top surface of the interlayer insulating film. Remaining element structures are formed. After lifetime is controlled by irradiation of helium or an electron beam, hydrogen annealing is performed. During the hydrogen annealing, the barrier metal is not present on the interlayer insulating film covering a gate electrode, enabling hydrogen atoms to reach a mesa part, whereby lattice defects generated in the mesa part by the irradiation of helium or an electron beam are recovered, recovering the gate threshold voltage. Thus, predetermined characteristics of a semiconductor device having a structure where a plug electrode is provided in a contact hole, via barrier metal are easily and stably obtained when lifetime control is performed.

公开(公告)号：US20220190155A1

公开(公告)日：2022-06-16

申请号：US17688224

申请日：2022-03-07

申请人： DENSO CORPORATION

发明人： Kenji KOUNO

IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L29/40

摘要： A semiconductor device includes a source electrode, a drain electrode and a gate. The gate controls a current flowing between the source electrode and the drain electrode. Capacitance between the gate and the drain electrode is first capacitance. Capacitance between the gate and the source electrode is second capacitance. A sum of the first capacitance and the second capacitance is equal to third capacitance. Total switching loss is a sum of first switching loss and second switching loss. The first switching loss is defined by a current variation rate, and the second switching loss is defined by a voltage variation rate. A capacitance ratio of the first capacitance to the third capacitance is set to a ratio to satisfying a relationship that the total switching loss is smaller than a predetermined value.

公开(公告)号：US20180197977A1

公开(公告)日：2018-07-12

申请号：US15740573

申请日：2016-08-08

申请人： DENSO CORPORATION

发明人： Kenji KOUNO

IPC分类号： H01L29/739 ,  H01L29/861 ,  H01L29/08 ,  H01L27/06

CPC分类号： H01L29/7397 ,  H01L27/04 ,  H01L27/0664 ,  H01L29/0821 ,  H01L29/0834 ,  H01L29/32 ,  H01L29/407 ,  H01L29/739 ,  H01L29/861 ,  H01L29/8613 ,  H01L29/868

摘要： A semiconductor device has a semiconductor substrate including a first conductivity-type drift layer, a second conductivity-type base layer disposed in a surface layer portion of the drift layer, and a second conductivity-type collector layer and a first conductivity-type cathode layer disposed opposite to the base layer with respect to the drift layer. In the semiconductor substrate, an IGBT region and a diode region are alternately and repetitively arranged. The IGBT region and the diode region are divided by a boundary between the collector layer and the cathode layer. The collector layer is defined as a first collector layer. The semiconductor device includes a second collector layer having a second conductivity-type impurity concentration higher than that of the first collector layer, at a surface of the semiconductor substrate adjacent to the first collector layer and the cathode layer.

公开(公告)号：US20230042174A1

公开(公告)日：2023-02-09

申请号：US17968899

申请日：2022-10-19

申请人： DENSO CORPORATION

发明人： Kenji KOUNO

IPC分类号： H01L29/10 ,  H01L29/16 ,  H01L29/06 ,  H01L29/808 ,  H01L27/06 ,  H01L29/78 ,  H03K17/687 ,  H02M1/08

摘要： A semiconductor device includes a junction field effect transistor (JFET) including a source electrode, a drain electrode, and a gate electrode, and a metal oxide semiconductor field effect transistor (MOSFET) including a source electrode, a drain electrode, and a gate electrode. The JFET and the MOSFET are cascode-connected such that the source electrode of the JFET and the drain electrode of the MOSFET are electrically connected. A gate voltage dependency of the JFET or a capacitance ratio of a mirror capacitance of the MOSFET to an input capacitance of the MOSFET is adjusted in a predetermined range.

公开(公告)号：US20150123718A1

公开(公告)日：2015-05-07

申请号：US14597315

申请日：2015-01-15

申请人： Denso Corporation

发明人： Kenji KOUNO

IPC分类号： H01L27/02 ,  H03K17/082

CPC分类号： H01L27/0255 ,  H01L29/7397 ,  H01L2924/0002 ,  H02M1/32 ,  H02M2001/0009 ,  H03K17/0828 ,  H03K17/145 ,  H03K2217/0027 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor substrate; a diode-built-in insulated-gate bipolar transistor having an insulated-gate bipolar transistor and a diode, which are disposed in the substrate, wherein the insulated-gate bipolar transistor includes a gate, and is driven with a driving signal input into the gate; and a feedback unit for detecting current passing through the diode. The driving signal is input from an external unit into the feedback unit. The feedback unit passes the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects no current through the diode, and the feedback unit stops passing the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects the current through the diode.

摘要翻译： 半导体器件包括：半导体衬底; 具有绝缘栅双极晶体管和二极管的二极管内置绝缘栅双极晶体管，其设置在所述衬底中，其中所述绝缘栅双极晶体管包括栅极，并且由输入到所述栅极的驱动信号驱动 门; 以及用于检测通过二极管的电流的反馈单元。 驱动信号从外部单元输入到反馈单元。 当反馈单元检测到没有通过二极管的电流时，反馈单元将驱动信号传递到绝缘栅双极晶体管的栅极，并且当反馈单元反馈时，反馈单元停止将驱动信号传递到绝缘栅双极晶体管的栅极 单元检测通过二极管的电流。

公开(公告)号：US20170077216A1

公开(公告)日：2017-03-16

申请号：US15123404

申请日：2015-01-29

申请人： DENSO CORPORATION

发明人： Kenji KOUNO

IPC分类号： H01L29/06 ,  H01L29/739 ,  H01L21/22 ,  H01L29/10 ,  H01L29/66 ,  H01L27/06 ,  H01L29/861

CPC分类号： H01L29/063 ,  H01L21/221 ,  H01L27/0664 ,  H01L27/0727 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/407 ,  H01L29/6609 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/861 ,  H01L29/8613 ,  H02M7/003

摘要： A semiconductor device includes a semiconductor substrate with: a drift layer; a base layer; and a collector layer and a cathode layer. In the semiconductor substrate, when a region operating as an IGBT device is an IGBT region and a region operating as a diode device is a diode region, the IGBT and diode regions are arranged alternately in a repetitive manner; a damaged region is arranged on a surface portion of the diode region in the semiconductor substrate. The IGBT and diode regions are demarcated by a boundary between the collector and cathode layers; and a surface portion of the IGBT region includes: a portion having the damaged region at a boundary side with the diode region; and another portion without the damaged region arranged closer to an inner periphery side relative to the boundary side.

摘要翻译： 半导体器件包括具有：漂移层的半导体衬底; 基层; 和集电极层和阴极层。 在半导体衬底中，当作为IGBT器件工作的区域是IGBT区域并且作为二极管器件工作的区域是二极管区域时，IGBT和二极管区域以重复的方式交替排列; 在半导体衬底中的二极管区域的表面部分上布置受损区域。 IGBT和二极管区域由集电极和阴极层之间的边界划分; 并且所述IGBT区域的表面部分包括：在与所述二极管区域的边界侧具有损坏区域的部分; 另一部分没有受损区域相对于边界侧布置得更靠近内周侧。

公开(公告)号：US20140361334A1

公开(公告)日：2014-12-11

申请号：US14468602

申请日：2014-08-26

申请人： DENSO CORPORATION

发明人： Hiromitsu TANABE ,  Kenji KOUNO ,  Yukio TSUZUKI

IPC分类号： H01L27/06 ,  H01L29/739 ,  H01L29/423

CPC分类号： H01L27/0664 ,  H01L27/0722 ,  H01L29/0696 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/861

摘要： In a semiconductor device including an IGBT and a freewheeling diode W≧2×L1/K1/2, where K≧2.5, W denotes a distance between the divided first regions, L1 denotes a thickness of the drift layer, k1 denotes a parameter that depends on structures of the insulated gate bipolar transistor and the freewheeling diode, and K denotes a value calculated by multiplying the parameter k1 by a ratio of a snapback voltage to a built-in potential between the deep well layer and the drift layer.

摘要翻译： 在包括IGBT和续流二极管W≥2×L1 / K1 / 2的半导体器件中，其中K≥2.5，W表示分割的第一区域之间的距离，L1表示漂移层的厚度，k1表示 取决于绝缘栅双极晶体管和续流二极管的结构，K表示通过将参数k1乘以深回阱层和漂移层之间的内置电位的回跳电压的比率而计算的值。

公开(公告)号：US20180151557A1

公开(公告)日：2018-05-31

申请号：US15570834

申请日：2016-07-22

申请人： DENSO CORPORATION

发明人： Hiromitsu TANABE ,  Kenji KOUNO

IPC分类号： H01L27/06 ,  H01L29/739 ,  H01L29/10 ,  H01L29/32 ,  H01L21/22

CPC分类号： H01L27/0664 ,  H01L21/221 ,  H01L21/26506 ,  H01L27/0727 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/739 ,  H01L29/7391 ,  H01L29/7397 ,  H01L29/78

摘要： A semiconductor device includes a semiconductor substrate provided with an IGBT cell having a collector region and a diode cell having a cathode region, a first defect layer and a second defect layer in a drift region. A region present in the drift region and surrounded by an interface between the IGBT cell and the diode cell orthogonal to a first principal plane, and a plane passing through a boundary between the collector region and the cathode region on a boundary line along an interface between the collector region and the drift region and crossing the first principal plane at an angle of 45 degrees is referred to as a boundary region. The diode cell satisfies a relationship of SD1>S, in which S is an area occupied by the boundary region and SD1 is an area occupied by the diode cell in a surface of the drift region.