公开(公告)号：US20220310830A1

公开(公告)日：2022-09-29

申请号：US17695961

申请日：2022-03-16

申请人： DENSO CORPORATION

发明人： Hiromitsu TANABE

IPC分类号： H01L29/739 ,  H01L29/10 ,  H01L29/06 ,  H01L29/861

摘要： In an IGBT region of a semiconductor device, a barrier region is disposed above a drift layer, and a contact trench is disposed between adjacent gate trenches in a semiconductor substrate. A first electrode is embedded in the contact trench. A connecting region is disposed between a bottom surface of the contact trench and the barrier region, and is connected to the barrier region and the first electrode. Further, the emitter region and the contact region are arranged in a direction different from an arrangement direction of the gate trenches. Thus, the semiconductor device can be miniaturized.

公开(公告)号：US20180294250A1

公开(公告)日：2018-10-11

申请号：US15570876

申请日：2016-05-27

申请人： DENSO CORPORATION

发明人： Kenji KOUNO ,  Hiromitsu TANABE

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L23/367 ,  H01L29/739 ,  H01L29/06 ,  H01L27/06 ,  H02M7/00

CPC分类号： H01L25/0655 ,  H01L23/367 ,  H01L24/06 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L25/07 ,  H01L25/18 ,  H01L27/0635 ,  H01L27/0727 ,  H01L29/0696 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/1095 ,  H01L29/7397 ,  H01L2224/04042 ,  H01L2224/32245 ,  H01L2224/33 ,  H01L2224/33181 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/12036 ,  H01L2924/13055 ,  H01L2924/14252 ,  H01L2924/181 ,  H02M7/003 ,  H02M7/5387 ,  H02M2001/327 ,  H02P27/06 ,  H01L2924/00012

摘要： The present disclosure provides a semiconductor chip. The semiconductor chip includes a switching element having a gate electrode, a first pad, and a second pad. The first control pad is electrically connected to the gate electrode and applied with a voltage controlling the switching element to switch on or switch off. The second control pad provides a current path of a control current flowing between the first control pad and the second control pad when the switching element is in a switch-on state. One of the first control pad or the second control pad includes two pad components and a remaining one of the first control pad or the second control pad is disposed between the two pad components of the one of the first control pad or the second control pad.

公开(公告)号：US20180047725A1

公开(公告)日：2018-02-15

申请号：US15791760

申请日：2017-10-24

申请人： FUJI ELECTRIC CO., LTD. ,  DENSO CORPORATION

发明人： Souichi YOSHIDA ,  Masaki TAMURA ,  Kenji KOUNO ,  Hiromitsu TANABE

IPC分类号： H01L27/07 ,  H01L29/08 ,  H01L29/06 ,  H01L21/8249

CPC分类号： H01L27/0716 ,  H01L21/8249 ,  H01L27/0727 ,  H01L28/20 ,  H01L29/0696 ,  H01L29/083 ,  H01L29/0834 ,  H01L29/32 ,  H01L29/407 ,  H01L29/7397 ,  H01L29/8611 ,  H01L29/8613

摘要： On a front surface side of an n− semiconductor substrate, an emitter electrode and trench gates each including a p base layer, a trench, a gate oxide film and a gate electrode are provided in an IGBT region and a FWD region. Among p base layers each between adjacent trenches, p base layers having an n+ emitter region are the IGBT emitter region and the p base layers not having the n+ emitter region are the FWD anode region. A lateral width of an n+ cathode region is narrower than a lateral width of the FWD anode region. A difference of a lateral width of the FWD anode region and a lateral width of the n+ cathode region is 50 μm or more. Thus, a semiconductor device may be provided that reduces the forward voltage drop while suppressing waveform oscillation during reverse recovery and having soft recover characteristics.

公开(公告)号：US20160020310A1

公开(公告)日：2016-01-21

申请号：US14798712

申请日：2015-07-14

申请人： DENSO CORPORATION

发明人： Tomofusa SHIGA ,  Hiromitsu TANABE

IPC分类号： H01L29/739 ,  H01L21/66 ,  H01L23/495 ,  H01L29/06 ,  H01L23/00 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/7397 ,  H01L22/14 ,  H01L22/32 ,  H01L23/4824 ,  H01L23/49562 ,  H01L24/48 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66348 ,  H01L2224/37147 ,  H01L2224/4813 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

摘要： A semiconductor device provides an element arrangement region on a semiconductor substrate including: a first semiconductor region on the semiconductor substrate; a second semiconductor region on the first semiconductor region; multiple trench gates penetrating the first semiconductor region and reaching the second semiconductor region; a third semiconductor region contacting the trench gate; a fourth semiconductor region on a rear surface; a first electrode connected to the first and second semiconductor regions; and a second electrode connected to the fourth semiconductor region. Each trench gate includes a main trench gate for generating a channel and a dummy trench gate for improving a withstand voltage of a component. The device further includes: a dummy gate wiring for applying a predetermined voltage to the dummy trench gate; and a dummy pad connected to the dummy gate wiring. The dummy pad and the first electrode are connected by a conductive member.

摘要翻译： 半导体器件在半导体衬底上提供元件布置区域，包括：半导体衬底上的第一半导体区域; 第一半导体区域上的第二半导体区域; 穿过第一半导体区域并到达第二半导体区域的多个沟槽栅极; 接触所述沟槽栅极的第三半导体区域; 在后表面上的第四半导体区域; 连接到第一和第二半导体区域的第一电极; 以及连接到第四半导体区域的第二电极。 每个沟槽栅极包括用于产生沟道的主沟槽栅极和用于提高部件的耐受电压的虚拟沟槽栅极。 该装置还包括：用于向虚拟沟槽栅极施加预定电压的虚拟栅极布线; 以及连接到虚拟栅极布线的虚拟焊盘。 虚拟焊盘和第一电极通过导电部件连接。

公开(公告)号：US20220140121A1

公开(公告)日：2022-05-05

申请号：US17578996

申请日：2022-01-19

申请人： FUJI ELECTRIC CO., LTD. ,  DENSO CORPORATION

发明人： Hiroshi MIYATA ,  Seiji NOGUCHI ,  Souichi YOSHIDA ,  Hiromitsu TANABE ,  Kenji KOUNO ,  Yasushi OKURA

IPC分类号： H01L29/739 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/423 ,  H01L21/768 ,  H01L29/40 ,  H01L29/06 ,  H01L29/861 ,  H01L29/417 ,  H01L29/45

摘要： A plug electrode is subject to etch back to remain in a contact hole and expose a barrier metal on a top surface of an interlayer insulating film. The barrier metal is subject to etch back, exposing the top surface of the interlayer insulating film. Remaining element structures are formed. After lifetime is controlled by irradiation of helium or an electron beam, hydrogen annealing is performed. During the hydrogen annealing, the barrier metal is not present on the interlayer insulating film covering a gate electrode, enabling hydrogen atoms to reach a mesa part, whereby lattice defects generated in the mesa part by the irradiation of helium or an electron beam are recovered, recovering the gate threshold voltage. Thus, predetermined characteristics of a semiconductor device having a structure where a plug electrode is provided in a contact hole, via barrier metal are easily and stably obtained when lifetime control is performed.

公开(公告)号：US20140361334A1

公开(公告)日：2014-12-11

申请号：US14468602

申请日：2014-08-26

申请人： DENSO CORPORATION

发明人： Hiromitsu TANABE ,  Kenji KOUNO ,  Yukio TSUZUKI

IPC分类号： H01L27/06 ,  H01L29/739 ,  H01L29/423

CPC分类号： H01L27/0664 ,  H01L27/0722 ,  H01L29/0696 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/861

摘要： In a semiconductor device including an IGBT and a freewheeling diode W≧2×L1/K1/2, where K≧2.5, W denotes a distance between the divided first regions, L1 denotes a thickness of the drift layer, k1 denotes a parameter that depends on structures of the insulated gate bipolar transistor and the freewheeling diode, and K denotes a value calculated by multiplying the parameter k1 by a ratio of a snapback voltage to a built-in potential between the deep well layer and the drift layer.

摘要翻译： 在包括IGBT和续流二极管W≥2×L1 / K1 / 2的半导体器件中，其中K≥2.5，W表示分割的第一区域之间的距离，L1表示漂移层的厚度，k1表示 取决于绝缘栅双极晶体管和续流二极管的结构，K表示通过将参数k1乘以深回阱层和漂移层之间的内置电位的回跳电压的比率而计算的值。

公开(公告)号：US20190027592A1

公开(公告)日：2019-01-24

申请号：US16066327

申请日：2016-12-01

申请人： DENSO CORPORATION

发明人： Hiromitsu TANABE

IPC分类号： H01L29/739 ,  H01L29/08 ,  H01L29/423

摘要： A semiconductor device includes a semiconductor substrate having first and second main surfaces, a first region formed in a surface layer of the first main surface, a drift layer disposed adjacent to the first region, a charge accumulation region having a higher concentration than the drift region, and a trench gate including a trench penetrating the first region and the charge accumulation region, and a gate electrode formed in the trench. The trench gate includes a main trench having a gate electrode to which a gate voltage is applied, and a dummy trench having a gate electrode to which a voltage different from the main trench is applied. The main trench and the dummy trench sandwiches the charge accumulation region, and a contact area S1 between the dummy trench and the charge accumulation region is larger than a contact area S2 between the main trench and the charge accumulation region.

公开(公告)号：US20180151557A1

公开(公告)日：2018-05-31

申请号：US15570834

申请日：2016-07-22

申请人： DENSO CORPORATION

发明人： Hiromitsu TANABE ,  Kenji KOUNO

IPC分类号： H01L27/06 ,  H01L29/739 ,  H01L29/10 ,  H01L29/32 ,  H01L21/22

CPC分类号： H01L27/0664 ,  H01L21/221 ,  H01L21/26506 ,  H01L27/0727 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/739 ,  H01L29/7391 ,  H01L29/7397 ,  H01L29/78

摘要： A semiconductor device includes a semiconductor substrate provided with an IGBT cell having a collector region and a diode cell having a cathode region, a first defect layer and a second defect layer in a drift region. A region present in the drift region and surrounded by an interface between the IGBT cell and the diode cell orthogonal to a first principal plane, and a plane passing through a boundary between the collector region and the cathode region on a boundary line along an interface between the collector region and the drift region and crossing the first principal plane at an angle of 45 degrees is referred to as a boundary region. The diode cell satisfies a relationship of SD1>S, in which S is an area occupied by the boundary region and SD1 is an area occupied by the diode cell in a surface of the drift region.

公开(公告)号：US20170373141A1

公开(公告)日：2017-12-28

申请号：US15686216

申请日：2017-08-25

申请人： FUJI ELECTRIC CO., LTD. ,  DENSO CORPORATION

发明人： Souichi YOSHIDA ,  Seiji NOGUCHI ,  Kenji KOUNO ,  Hiromitsu TANABE

IPC分类号： H01L29/06 ,  H01L29/739 ,  H01L29/66 ,  H01L29/40 ,  H01L29/167 ,  H01L29/10 ,  H01L29/08 ,  H01L27/06 ,  H01L21/324 ,  H01L21/265 ,  H01L21/225 ,  H01L29/861 ,  H01L21/22

摘要： A method of manufacturing a semiconductor device having an insulated gate bipolar transistor portion and a freewheeling diode portion. The method includes introducing an impurity to a rear surface of a semiconductor substrate, performing first heat treating to activate the impurity to form a field stop layer, performing a first irradiation to irradiate light ions from the rear surface of semiconductor substrate to form, in the semiconductor substrate, a first low-lifetime region, performing a second irradiation to irradiate the light ions from the rear surface of the semiconductor substrate to form, in the field stop layer, a second low-lifetime region, and performing second heat treating to reduce a density of defects generated in the field stop layer when the second irradiation is performed. Each of the first and second low-lifetime regions has a carrier lifetime thereof shorter than that of any region of the semiconductor device other than the first and second low-lifetime regions.