公开(公告)号：US20250029916A1

公开(公告)日：2025-01-23

申请号：US18903703

申请日：2024-10-01

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Ryoichi KATO ,  Yoshinari IKEDA ,  Yuma MURATA

IPC: H01L23/522 ,  H01L23/49 ,  H01L23/498 ,  H01L25/16 ,  H01R4/02 ,  H01R43/02

Abstract: A semiconductor device includes a capacitor including a first connection terminal, a second connection terminal, and a second insulating member disposed between the first connection terminal and the second connection terminal, and a semiconductor module including a multi-layer terminal portion in which a first power terminal, a first insulating member, and a second power terminal are sequentially stacked. The first connection terminal and the second connection terminal extend to an outside, the first power terminal includes a first bonding area electrically connected to the first connection terminal, the second power terminal includes a second bonding area electrically connected to the second connection terminal, and the first insulating member includes a terrace portion extending from an end portion of the second power terminal toward the first connection terminal in a plan view of the semiconductor module.

公开(公告)号：US20230005801A1

公开(公告)日：2023-01-05

申请号：US17824365

申请日：2022-05-25

Applicant: FUJI ELECTRIC CO., LTD

Inventor： Ryoichi KATO

IPC: H01L23/10 ,  H01L25/065 ,  H01L23/00 ,  H01L23/053 ,  H01L23/31 ,  H01L21/56

Abstract: There are provided a semiconductor module capable of preventing the peeling of a sealing resin on the side where a connection section used for the connection to a semiconductor element is arranged and a manufacturing method for a semiconductor module. A semiconductor module includes: an outer frame; sealing resins; gate signal output terminals, and partition sections laid across the outer flame to partition a space into a plurality of housing sections, in the partition sections which the gate signal output terminals with connection sections exposed are arranged. The partition sections have through holes where sealing resins are formed, the sealing resins connecting adjacent housing sections and the sealing resin formed in the through hole being continuous with the sealing resins formed in the housing sections.

公开(公告)号：US20220022340A1

公开(公告)日：2022-01-20

申请号：US17365053

申请日：2021-07-01

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Ryoichi KATO

IPC: H05K7/20 ,  H01L23/42

Abstract: A semiconductor module has a heat conduction section provided between a multilayer substrate, on which semiconductor chips are mounted, and a cooler. The heat conduction section includes a frame and an opening, and the opening has a grease portion which is provided partly in the opening and is in contact with the multilayer substrate and the cooler, and a space portion which is provided between the grease portion and the frame in a partial and band-shaped manner.

公开(公告)号：US20160225688A1

公开(公告)日：2016-08-04

申请号：US15091957

申请日：2016-04-06

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Takashi SAITO ,  Ryoichi KATO ,  Yoshitaka NISHIMURA ,  Fumihiko MOMOSE

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/367 ,  H01L21/4875 ,  H01L21/4882 ,  H01L23/3735 ,  H01L23/4006 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/49894 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device includes a plurality of semiconductor elements; insulating circuit boards each including an insulating substrate, a circuit portion on a front surface of the insulating substrate connected to one semiconductor element, and a metal portion on a rear surface of the insulating substrate; a metal plate joined to the metal portions of the plurality of insulating circuit boards; and a joint member joining the plurality of insulating circuit boards to the metal plate. The metal plate has a front surface in which the insulating circuit boards are arranged apart from each other, and a rear surface including first regions corresponding to positions of the metal portions and second regions other than the first regions. At least a part of a surface of each of the first regions has a surface work-hardened layer, and the second regions have a hardness different from that of the surface work-hardened layer.

Abstract translation: 半导体器件包括多个半导体元件; 绝缘电路板，​​每个绝缘基板包括绝缘基板，连接到一个半导体元件的绝缘基板的前表面上的电路部分和绝缘基板的后表面上的金属部分; 连接到所述多个绝缘电路板的金属部分的金属板; 以及将多个绝缘电路板接合到金属板的接合构件。 金属板具有绝缘电路板彼此分开布置的前表面，以及包括与除了第一区域之外的金属部分和第二区域的位置相对应的第一区域的后表面。 每个第一区域的表面的至少一部分具有表面加工硬化层，并且第二区域具有与表面加工硬化层的硬度不同的硬度。

公开(公告)号：US20240006303A1

公开(公告)日：2024-01-04

申请号：US18469840

申请日：2023-09-19

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Ryoichi KATO ,  Yoshinari IKEDA ,  Yuma MURATA

IPC: H01L23/522 ,  H01L23/49 ,  H01L23/498 ,  H01L25/16 ,  H01R4/02 ,  H01R43/02

CPC classification number: H01L23/5222 ,  H01L23/49 ,  H01L23/49811 ,  H01L25/162 ,  H01R4/029 ,  H01R43/0221

Abstract: A capacitor includes a case including a capacitor element, a first connection terminal, a second connection terminal, and a second insulating sheet formed between the first connection terminal and the second connection terminal, and the first connection terminal, the second insulating sheet, and the second connection terminal extend to the outside from the case. A semiconductor module includes a multi-layer terminal portion in which a first power terminal, a first insulating sheet, and a second power terminal are sequentially stacked. The first power terminal includes a first bonding area electrically connected to the first connection terminal, and the second power terminal includes a second bonding area electrically connected to the second connection terminal. The first insulating sheet includes a terrace portion that extends in a direction from the second bonding area towards the first bonding area in a planar view.

公开(公告)号：US20230142607A1

公开(公告)日：2023-05-11

申请号：US17956787

申请日：2022-09-29

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Tadahiko SATO ,  Ryoichi KATO ,  Yuma MURATA

IPC: H01L23/498 ,  H01L21/48 ,  H01R12/55 ,  H01R4/02 ,  H01R43/02 ,  H01G2/06

CPC classification number: H01L23/49811 ,  H01G2/06 ,  H01L21/4853 ,  H01R4/029 ,  H01R12/55 ,  H01R43/0221 ,  H01L25/072

Abstract: A semiconductor module includes an insulating sheet which has a first surface and extends in a first direction and a first terminal. The first terminal has a first region disposed on the first surface of the insulating sheet and having a first width in a second direction perpendicular to the first direction, a second region extending from the first region and having a second width in the second direction narrower than the first width, and a third region located away from the first surface and being electrically connected to both the first region and the second region.

公开(公告)号：US20220415749A1

公开(公告)日：2022-12-29

申请号：US17825520

申请日：2022-05-26

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Naoyuki KANAI ,  Shun OKADA ,  Ryoichi KATO

IPC: H01L23/367 ,  H01L23/485

Abstract: A semiconductor device includes a baseplate and a case which includes an external wall surrounding an internal space and a dividing wall extending in a first direction and separating the space into compartments. The dividing wall has a lower end fixed to the principal surface and includes, on a sidewall, a terrace positioned further away from the principal surface than the lower end and hanging out toward the space compared to the lower end in a second direction parallel to the principal surface and perpendicular to the first direction. A terminal's bonding part, to which a wire is bonded, is disposed on the terrace. A ratio of the wire's diameter to the bonding part's width in the first direction is set to ≤0.15, which prevents a situation where bonding power is not sufficiently applied to the bonding part during ultrasonic bonding of the wire, thus increasing the bonding strength.

公开(公告)号：US20220262895A1

公开(公告)日：2022-08-18

申请号：US17564922

申请日：2021-12-29

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Akito NAKAGOME ,  Ryoichi KATO ,  Yoshinari IKEDA

IPC: H01L49/02

Abstract: A semiconductor device includes a terminal portion including a second external terminal, an insulating sheet disposed on the second external terminal, and a first external terminal disposed on the insulating sheet. The first external terminal has a first end portion with a first end. At the first end portion, a rear surface of the first external terminal is not parallel to a front surface of the second external terminal so that, in a thickness direction of the first external terminal, a distance between the first external terminal and the second external terminal increases with as the first end is approached.

公开(公告)号：US20210280555A1

公开(公告)日：2021-09-09

申请号：US17185931

申请日：2021-02-25

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Yuma MURATA ,  Ryoichi KATO ,  Naoyuki KANAI ,  Akito NAKAGOME ,  Yoshinari IKEDA

IPC: H01L23/00 ,  H01L23/538 ,  H01L25/07

Abstract: A semiconductor module includes a case with a side wall in a first direction in which gate and source terminals are embodied and exposed therefrom, first and second semiconductor elements each having gate and source electrodes, gate and source relay layers positioned at a center between the first and second semiconductor elements in the first direction at a side of the semiconductor elements farther from the side wall, first gate and source wires respectively connecting the gate and source terminals to the gate and source relay layers, second gate and source wires, and third gate and source wires, respectively connecting the gate and source electrodes of the first semiconductor element, and the gate and source electrode of the second semiconductor element, to the gate and source relay layers. The first to third source wires are respectively located closer to the first to third gate wires than any other gate wires.

公开(公告)号：US20210280534A1

公开(公告)日：2021-09-09

申请号：US17331013

申请日：2021-05-26

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Hiroaki HOKAZONO ,  Ryoichi KATO

IPC: H01L23/00 ,  H01L25/07 ,  H01L25/18 ,  H01L23/373 ,  H01L21/48 ,  H01L25/00

Abstract: A semiconductor device includes: a first semiconductor chip having a metal layer on a top surface; a first wiring member arranged to face the metal layer; a sintered-metal layer arranged between the metal layer and the first wiring member, having a first region and a plurality of second regions provided inside the first region, the second regions having lower tensile strength than the first region; and a metallic member arranged inside the sintered-metal layer, wherein the second regions of the sintered-metal layer have lower tensile strength than the metal layer of the first semiconductor chip.