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公开(公告)号:US20230313378A1
公开(公告)日:2023-10-05
申请号:US17709931
申请日:2022-03-31
发明人: Yongjing Lin , Lei Zhou , Muhannad Mustafa , Shih Chung Chen , Zhihui Liu , Chi-Chou Lin , Bin Cao , Janardhan Devrajan , Mario D. Silvetti , Mandyam Sriram
IPC分类号: C23C16/458 , C23C16/455
CPC分类号: C23C16/4586 , C23C16/45544
摘要: Substrate support, substrate support assemblies and process chambers comprising same are described. The substrate support has a thermally conductive body with a top surface, a bottom surface and an outer edge, and a plurality of long edge purge channel outlet opening at the outer edge of the thermally conductive body. The substrate support is configured to support a substrate to be processed on a top surface of the substrate support. The top surface of the thermally conductive body may have a ceramic coating. Each of the plurality of purge channel outlet is in fluid communication with a long edge purge channel. The long edge purge channel is coated with a long edge purge channel coating. A substrate support assembly includes the substrate support and the support post coupled to the substrate support. The processing chamber include a chamber body and the substrate support within the chamber body.
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公开(公告)号:US11658218B2
公开(公告)日:2023-05-23
申请号:US17668992
申请日:2022-02-10
发明人: Yongjing Lin , Karla M Bernal Ramos , Shih Chung Chen , Yixiong Yang , Lin Dong , Steven C. H. Hung , Srinivas Gandikota
CPC分类号: H01L29/408 , H01L21/0228 , H01L21/02153 , H01L21/28158 , H01L29/513 , H01L29/517 , H01L29/7851
摘要: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
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公开(公告)号:US20230113514A1
公开(公告)日:2023-04-13
申请号:US17541702
申请日:2021-12-03
发明人: Shih Chung Chen , Yongjing Lin , Chi-Chou Lin , Zhiyong Wang , Chih-Hsun Hsu , Mandyam Sriram , Tza-Jing Gung
IPC分类号: H01L21/768 , H01L21/311 , H01L21/02
摘要: Processing methods described herein comprise forming a metal gate film on a narrow feature and a wide feature and depositing a hard mask on the metal gate film. The hard mask forms on the metal gate film at a top, bottom and sidewalls of the wide feature and on a top of the narrow feature to cover the metal gate film. Some processing methods comprise oxidizing the metal gate film on the narrow feature to convert a portion of the metal gate film to a metal oxide film. Some processing methods comprise etching the metal oxide film from the narrow feature to leave a gradient etch profile. Some processing methods comprise filling the narrow feature and the wide feature with a gap fill material comprising one or more of a metal nitride, titanium nitride (TiN) or titanium oxynitride (TiON), the gap fill material substantially free of seams and voids.
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公开(公告)号:US20220367236A1
公开(公告)日:2022-11-17
申请号:US17497881
申请日:2021-10-08
发明人: Muhannad Mustafa , Yongjing Lin , Satish Radhakrishnan , Haoyan Sha , Shih Chung Chen , Mario D. Silvetti , Mandyam Sriram , Vijay D. Parkhe
IPC分类号: H01L21/687 , H01L21/683 , C23C16/458 , C23C16/46
摘要: Some embodiments of the disclosure relate to methods of modifying a heater pedestal to improve temperature and thickness uniformity. Some embodiments of the disclosure relate to the modified heater pedestals with improved temperature and thickness uniformity. In some embodiments, the height of support mesas in different regions of the pedestal are modified to increase temperature uniformity. In some embodiments, the heater elements are moved above the vacuum channel and purge channel to increase temperature uniformity. In some embodiments, the edge ring is modified to be coplanar with the top of a supported substrate.
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公开(公告)号:US20240087899A1
公开(公告)日:2024-03-14
申请号:US17941557
申请日:2022-09-09
发明人: Zhihui Liu , Seshadri Ganguli , Tianyi Huang , Yixiong Yang , Srinivas Gandikota , Yuanhua Zheng , Yongjing Lin , Keyur Karandikar , Elizabeth Mao
IPC分类号: H01L21/225 , H01L21/02 , H01L29/40
CPC分类号: H01L21/225 , H01L21/02178 , H01L21/02181 , H01L21/02186 , H01L21/02189 , H01L21/02192 , H01L21/02194 , H01L21/0234 , H01L29/401
摘要: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. The methods include treating a surface of a metal gate stack with a radical treatment. The radical treatment may be used to treat one or more layers or surfaces of layers in the metal gate stack. The radical treatment may be performed once or multiple times during the methods described herein. The radical treatment comprises flowing one or more of nitrogen radicals (N2*) and hydrogen radicals (H*) over the surface of the metal gate stack.
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公开(公告)号:US20230295803A1
公开(公告)日:2023-09-21
申请号:US18135024
申请日:2023-04-14
发明人: Haoming Yan , Shih Chung Chen , Mandyam Sriram , EunKee Hong , Janardhan Devrajan , Lakmal C. Kalutarage , Yongjing Lin , Lisa Michelle Mandrell , Arkaprava Dan
IPC分类号: C23C16/455 , C23C16/56 , H01L21/285 , H01L21/321 , H01L21/3205 , H01L29/40
CPC分类号: C23C16/45553 , C23C16/56 , H01L21/28525 , H01L21/28568 , H01L21/321 , H01L21/32055 , H01L21/28575 , H01L29/401
摘要: Methods of forming metal-containing films for electronic devices (e.g., logic devices and/or memory devices) and methods for reducing equivalent oxide thickness (EOT) penalty in electronic devices are disclosed. The methods comprise exposing a substrate surface to a metal precursor, such as titanium chloride (TiCl4), a reducing agent, such as a cyclic 1,4-diene, and a reactant, ammonia (NH3), either simultaneously, partially simultaneously or separately and sequentially to form the metal-containing film.
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公开(公告)号:US11476267B2
公开(公告)日:2022-10-18
申请号:US16876280
申请日:2020-05-18
发明人: Jacqueline S. Wrench , Yixiong Yang , Yong Wu , Wei V. Tang , Srinivas Gandikota , Yongjing Lin , Karla M Bernal Ramos , Shih Chung Chen
IPC分类号: H01L21/285 , H01L21/28 , H01L21/311 , H01L27/11556 , H01L21/67 , C23C16/06 , C23C16/50 , C23C16/455 , H01L29/423
摘要: Methods of forming memory structures are discussed. Specifically, methods of forming 3D NAND devices are discussed. Some embodiments form memory structures with a metal nitride barrier layer, an α-tungsten layer, and a bulk metal material. The barrier layer comprises a TiXN or TaXN material, where X comprises a metal selected from one or more of aluminum (Al), silicon (Si), tungsten (W), lanthanum (La), yttrium (Yt), strontium (Sr), or magnesium (Mg).
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公开(公告)号:US20240204061A1
公开(公告)日:2024-06-20
申请号:US18067979
申请日:2022-12-19
发明人: Srinivas Gandikota , Yixiong Yang , Yongjing Lin , Tuerxun Ailihumaer , Tengzhou Ma , Yuanhua Zheng , Zhihui Liu , Shih Chung Chen , Janardhan Devrajan , Yi Xu , Yu Lei , Mandyam Sriram
IPC分类号: H01L29/40 , H01L29/423
CPC分类号: H01L29/401 , H01L29/42392 , H01L29/4925
摘要: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide methods to reduce the resistance of the work function layer of an electronic device, as well as using a low resistivity metal for filling the gate.
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公开(公告)号:US20230005945A1
公开(公告)日:2023-01-05
申请号:US17941421
申请日:2022-09-09
发明人: Jacqueline S. Wrench , Yixiong Yang , Yong Wu , Wei V. Tang , Srinivas Gandikota , Yongjing Lin , Karla M Bernal Ramos , Shih Chung Chen
IPC分类号: H01L27/11556 , H01L21/285 , H01L21/67 , H01L21/28 , C23C16/06 , H01L21/311 , C23C16/50 , C23C16/455 , H01L29/423
摘要: Methods of forming memory structures are discussed. Specifically, methods of forming 3D NAND devices are discussed. Some embodiments form memory structures with a metal nitride barrier layer, an α-tungsten layer, and a bulk metal material. The barrier layer comprises a TiXN or TaXN material, where X comprises a metal selected from one or more of aluminum (Al), silicon (Si), tungsten (W), lanthanum (La), yttrium (Yt), strontium (Sr), or magnesium (Mg).
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公开(公告)号:US11276569B2
公开(公告)日:2022-03-15
申请号:US16515230
申请日:2019-07-18
发明人: Yongjing Lin , Tza-Jing Gung , Masaki Ogata , Yusheng Zhou , Xinhai Han , Deenesh Padhi , Juan Carlos Rocha , Amit Kumar Bansal , Mukund Srinivasan
IPC分类号: H01L21/02
摘要: Embodiments described herein relate to manufacturing layer stacks of oxide/nitride (ON) layers with minimized in-plane distortion (IPD) and lithographic overlay errors. A method of forming a layer stack ON layers includes flowing a first silicon-containing gas, an oxygen-containing gas, and a first dilution gas. A RF power is symmetrically applied to form a first material layer of SiO2. A second silicon-containing gas, a nitrogen-containing gas, and a second dilution gas are flowed. A second RF power is symmetrically applied to form a second material layer of Si3N4. The flowing the first silicon-containing gas, the oxygen-containing gas, and the first dilution gas, the symmetrically applying the first RF power, the flowing the second silicon-containing gas, the nitrogen-containing gas, and the second dilution gas, and the symmetrically applying the second RF power is repeated until a desired number of first material layers and second material layers make up a layer stack.
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