公开(公告)号：US11658218B2

公开(公告)日：2023-05-23

申请号：US17668992

申请日：2022-02-10

Applicant: Applied Materials, Inc.

Inventor： Yongjing Lin ,  Karla M Bernal Ramos ,  Shih Chung Chen ,  Yixiong Yang ,  Lin Dong ,  Steven C. H. Hung ,  Srinivas Gandikota

IPC: H01L29/40 ,  H01L29/51 ,  H01L29/78 ,  H01L21/02 ,  H01L21/28

CPC classification number: H01L29/408 ,  H01L21/0228 ,  H01L21/02153 ,  H01L21/28158 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7851

Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).

公开(公告)号：US20230010499A1

公开(公告)日：2023-01-12

申请号：US17859777

申请日：2022-07-07

Applicant: Applied Materials, Inc.

Inventor： Brian K. Kirkpatrick ,  Steven C. H. Hung ,  Malcolm J. Bevan

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/67 ,  H01L21/687

Abstract: Exemplary integrated cluster tools may include a factory interface including a first transfer robot. The tools may include a wet clean system coupled with the factory interface at a first side of the wet clean system. The tools may include a load lock chamber coupled with the wet clean system at a second side of the wet clean system opposite the first side of the wet clean system. The tools may include a first transfer chamber coupled with the load lock chamber. The first transfer chamber may include a second transfer robot. The tools may include a thermal treatment chamber coupled with the first transfer chamber. The tools may include a second transfer chamber coupled with the first transfer chamber. The second transfer chamber may include a third transfer robot. The tools may include a metal deposition chamber coupled with the second transfer chamber.

公开(公告)号：US11552177B2

公开(公告)日：2023-01-10

申请号：US17013161

申请日：2020-09-04

Applicant: Applied Materials, Inc.

Inventor： Srinivas Gandikota ,  Steven C. H. Hung ,  Mandyam Sriram ,  Jacqueline S. Wrench ,  Yixiong Yang ,  Yong Yang

IPC: H01L29/49 ,  H01L29/51 ,  H01L29/40 ,  H01L21/28 ,  H01L21/285

Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiments comprise NbN as a PMOS work function material at a thickness in a range of greater than or equal to 5 Å to less than or equal to 50 Å. The PMOS work function material comprising NbN has an effective work function of greater than or equal to 4.75 eV. Some embodiments comprise HfO2 as a high-κ metal oxide layer. Some embodiments provide improved PMOS bandedge performance evidenced by improved flatband voltage. Some embodiments exclude transition metal niobium nitride materials as work function materials.

公开(公告)号：US20210398814A1

公开(公告)日：2021-12-23

申请号：US17348081

申请日：2021-06-15

Applicant: Applied Materials, Inc.

Inventor： Steven C. H. Hung ,  Benjamin Colombeau ,  Abhishek Dube ,  Sheng-Chin Kung ,  Patricia M. Liu ,  Malcolm J. Bevan ,  Johanes F. Swenberg

IPC: H01L21/28 ,  H01L21/02

Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.

公开(公告)号：US09437640B2

公开(公告)日：2016-09-06

申请号：US14481038

申请日：2014-09-09

Applicant: Applied Materials, Inc.

Inventor： Sherry Mings ,  Patricia M. Liu ,  Steven C. H. Hung

IPC: H01L27/14 ,  H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14689

Abstract: Backside illuminated sensors and methods of manufacture are described. Specifically, a backside illuminated sensor with a dipole modulating layer near the photodiode is described.

Abstract translation: 描述背面照明传感器和制造方法。 具体来说，描述了在光电二极管附近具有偶极子调制层的背面照明传感器。

公开(公告)号：US11888045B2

公开(公告)日：2024-01-30

申请号：US17557787

申请日：2021-12-21

Applicant: Applied Materials, Inc.

Inventor： Yongjing Lin ,  Karla M Bernal Ramos ,  Luping Li ,  Shih Chung Chen ,  Jacqueline S. Wrench ,  Yixiong Yang ,  Steven C. H. Hung ,  Srinivas Gandikota ,  Naomi Yoshida ,  Lin Dong

IPC: H01L29/51 ,  H01L29/40 ,  H01L29/49

CPC classification number: H01L29/513 ,  H01L29/401 ,  H01L29/4958 ,  H01L29/4966

Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitriride (TiMgN, titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN).

公开(公告)号：US11456178B2

公开(公告)日：2022-09-27

申请号：US17348081

申请日：2021-06-15

Applicant: Applied Materials, Inc.

Inventor： Steven C. H. Hung ,  Benjamin Colombeau ,  Abhishek Dube ,  Sheng-Chin Kung ,  Patricia M. Liu ,  Malcolm J. Bevan ,  Johanes F. Swenberg

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/321 ,  H01L21/8234

Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.

公开(公告)号：US11171047B2

公开(公告)日：2021-11-09

申请号：US16914414

申请日：2020-06-28

Applicant: Applied Materials, Inc.

Inventor： Yixiong Yang ,  Srinivas Gandikota ,  Steven C. H. Hung ,  Jacqueline S. Wrench ,  Yongjing Lin ,  Susmit Singha Roy ,  Wei V. Tang ,  Shih Chung Chen

IPC: H01L21/00 ,  H01L21/768 ,  H01L21/02

Abstract: Methods of forming semiconductor device with fluorine-incorporated metal nitride films are described. A substrate surface is exposed to a metal fluoride precursor to form a metal-fluorine species on the substrate surface. The substrate surface is exposed to a nitriding agent to react with the metal-fluorine species to form a fluorine-incorporated metal nitride film.

公开(公告)号：US10510545B2

公开(公告)日：2019-12-17

申请号：US16244051

申请日：2019-01-09

Applicant: Applied Materials, Inc.

Inventor： Houda Graoui ,  Johanes S. Swenberg ,  Wei Liu ,  Steven C. H. Hung

IPC: H01L21/28 ,  H01L21/285 ,  H01L29/45 ,  H01L21/324 ,  H01L29/40 ,  H01L21/321 ,  H01L21/02

Abstract: Embodiments described herein generally relate to enable the formation of a metal gate structure with a reduced effective oxide thickness over a similar structure formed via conventional methods. A plasma hydrogenation process followed by a plasma nitridization process, or a single-step plasma hydrogenation and nitridization process, is performed on a metal nitride layer in a film stack, thereby, according to some embodiments, removing oxygen atoms disposed within layers of the film stack and, in some embodiments, adding nitrogen atoms to the layers of the film stack. As a result, an effective oxide thickness of the metal gate structure is reduced with little or no accompanying flatband voltage shift.

公开(公告)号：US20240365551A1

公开(公告)日：2024-10-31

申请号：US18630142

申请日：2024-04-09

Applicant: Applied Materials, Inc.

Inventor： Chang Seok Kang ,  Steven C. H. Hung ,  Hsueh Chung Chen ,  Naomi Yoshida ,  Sung-Kwan Kang ,  Balasubramanian Pranatharthiharan

IPC: H10B43/35 ,  H01L21/67 ,  H01L23/528 ,  H01L23/532 ,  H10B43/20

CPC classification number: H10B43/35 ,  H01L21/67161 ,  H01L23/5283 ,  H01L23/53214 ,  H01L23/53257 ,  H10B43/20

Abstract: Exemplary semiconductor structures may include a substrate. The structures may include a first layer of silicon-and-oxygen-containing material overlying the substrate. The structures may include a second layer of silicon-and-oxygen-containing material. The structures may include a first layer of metal-and-oxygen-containing material between the first layer of silicon-and-oxygen-containing material and the second layer of silicon-and-oxygen-containing material. The first layer of metal-and-oxygen-containing material may include a first metal. The structures may include a second layer of metal-and-oxygen-containing material disposed within the first layer of metal-and-oxygen-containing material. The second layer of metal-and-oxygen-containing material may include a second metal. The structures may include a gate disposed within the second layer of metal-and-oxygen-containing material.