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    SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20160056113A1

    公开(公告)日：2016-02-25

    申请号：US14712382

    申请日：2015-05-14

    申请人： Yeong-Kwon KO ,  Tae-Hyeong KIM ,  Ji-Hwang KIM ,  Sun-Kyoung SEO ,  Tae-Je CHO

    发明人： Yeong-Kwon KO ,  Tae-Hyeong KIM ,  Ji-Hwang KIM ,  Sun-Kyoung SEO ,  Tae-Je CHO

    IPC分类号： H01L23/544 ,  H01L25/065 ,  H01L23/48

    CPC分类号： H01L23/544 ,  B23K26/53 ,  H01L21/76898 ,  H01L25/0657 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2223/5448 ,  H01L2224/16225 ,  H01L2225/06541 ,  H01L2225/06593

    摘要： Semiconductor devices and methods for manufacturing a semiconductor device include a first semiconductor substrate in which a first scribe line region and a first chip region are defined, a first alignment mark inside the first semiconductor substrate and in the first scribe line region so as to be spaced apart from an upper side of the first semiconductor substrate, a second semiconductor substrate on the first semiconductor substrate and in which a second scribe line region and a second chip region are defined, and a second alignment mark inside the second semiconductor substrate and in the second scribe line region so as to be spaced apart from an upper side of the second semiconductor substrate, wherein the second semiconductor substrate is on the first semiconductor substrate so that positions of the first alignment mark and the second alignment mark correspond to each other.

    摘要翻译： 用于制造半导体器件的半导体器件和方法包括其中限定第一划线区域和第一芯片区域的第一半导体衬底，第一半导体衬底内部和第一划线区域中的第一对准标记，以便间隔开 除了第一半导体衬底的上侧之外，在第一半导体衬底上限定第二划线区域和第二芯片区域的第二半导体衬底以及第二半导体衬底内部的第二对准标记 切割线区域与第二半导体衬底的上侧隔开，其中第二半导体衬底位于第一半导体衬底上，使得第一对准标记和第二对准标记的位置彼此对应。

    CHIP-STACKED SEMICONDUCTOR PACKAGE
    3.
    发明申请
    CHIP-STACKED SEMICONDUCTOR PACKAGE 有权
    芯片堆叠半导体封装

    公开(公告)号：US20160056101A1

    公开(公告)日：2016-02-25

    申请号：US14818682

    申请日：2015-08-05

    申请人： Young-kun JEE ,  Tae-hong MIN ,  Sun-kyoung SEO

    发明人： Young-kun JEE ,  Tae-hong MIN ,  Sun-kyoung SEO

    IPC分类号： H01L23/498 ,  H01L25/065 ,  H01L23/31

    CPC分类号： H01L25/0657 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/3178 ,  H01L23/481 ,  H01L2224/16145 ,  H01L2224/73204 ,  H01L2225/06513

    摘要： A chip-stacked semiconductor package including a first chip having a plurality of first real bump pads and a plurality of first dummy bump pads, a second chip on the first chip, the second chip including a plurality of real bumps and a plurality of bridge dummy bumps, the plurality of real bumps electrically connected to the plurality of first real bump pads, the plurality of bridge dummy bumps connected to the plurality of first dummy bump pads, and a sealing member sealing the first chip and the second chip may be provided.

    摘要翻译： 一种芯片堆叠半导体封装，包括具有多个第一实际凸块焊盘和多个第一虚拟凸块焊盘的第一芯片，第一芯片上的第二芯片，所述第二芯片包括多个实际凸块和多个桥模 可以提供电连接到多个第一真实凸块焊盘的多个真实凸块，连接到多个第一虚拟凸块焊盘的多个桥接虚拟凸起以及密封第一芯片和第二芯片的密封构件。