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16 条记录 (耗时 0.017 秒)

    Enhanced integrated waveshaping circuit
    5.
    发明授权
    Enhanced integrated waveshaping circuit 失效
    增强型集成波形电路

    公开(公告)号：US5410188A

    公开(公告)日：1995-04-25

    申请号：US133405

    申请日：1993-10-07

    申请人： Para Segaram

    发明人： Para Segaram

    IPC分类号： H03M5/12 ,  H03M1/74 ,  H04L25/02 ,  H04L25/03 ,  H04L25/04 ,  H03K17/28 ,  H03K5/01 ,  H03K5/19

    CPC分类号： H04L25/0286 ,  H03M1/745 ,  H04L25/03853 ,  H04L25/0272 ,  H04L25/0282

    摘要： The waveshaping functions provided by a summing resistor network and filter are performed by a waveshaping circuit that can be integrated with transceiving functions within a single integrated circuit. The waveshaping circuit utilizes the edges of an oscillator signal to generate a series of pairs of logic signals which have a defined timing relationship with respect to an input data signal. Each pair of logic signals is then utilized by a corresponding number of current stages to provide both an incremental portion of an output waveform and an incremental portion of a complementary output waveform. The pair of output waveforms can then be produced by summing together all of the incremental portions of the pair of waveforms.

    摘要翻译： 由一个求和电阻网络和滤波器提供的波形整形功能是通过一个波形整形电路进行的，该电路可以与单个集成电路中的收发功能相集成。 波形整形电路利用振荡器信号的边缘产生一系列相对于输入数据信号具有定义的时序关系的逻辑信号对。 然后，每对逻辑信号被相应数目的当前级用来提供输出波形的增量部分和互补输出波形的增量部分。 然后可以通过将所述一对波形的所有增量部分相加来产生一对输出波形。

    High Speed Communication System With A Feedback Synchronization Loop
    6.
    发明申请
    High Speed Communication System With A Feedback Synchronization Loop 有权
    具有反馈同步环路的高速通信系统

    公开(公告)号：US20060165186A1

    公开(公告)日：2006-07-27

    申请号：US11279350

    申请日：2006-04-11

    申请人： Para Segaram

    发明人： Para Segaram

    IPC分类号： H04L25/00

    CPC分类号： H04L25/028 ,  H04L7/0008 ,  H04L7/0025 ,  H04L7/0337 ,  H04L25/0272 ,  H04L25/0292 ,  H04L25/14

    摘要： In a communications device having a physical layer device and a processing device connected to the physical layer device, the number of input/output (I/O) ports required for communication between the devices in the gigabit range is substantially reduced by utilizing millivolt differential I/O drivers and receivers. In addition, a calibration feedback loop synchronizes the data and clock signals on the processing device, thereby eliminating the need to recover the clock on the processing device.

    摘要翻译： 在具有连接到物理层设备的物理层设备和处理设备的通信设备中，在千兆比特范围内的设备之间进行通信所需的输入/输出（I / O）端口的数量通过利用毫伏差分I / O驱动程序和接收器。 此外，校准反馈环路在处理设备上同步数据和时钟信号，从而消除了在处理设备上恢复时钟的需要。

    Array connector with deflectable coupling structure for mating with other components
    9.
    发明授权
    Array connector with deflectable coupling structure for mating with other components 有权
    阵列连接器，具有可偏转的耦合结构，用于与其他部件配合

    公开(公告)号：US06884120B1

    公开(公告)日：2005-04-26

    申请号：US10608255

    申请日：2003-06-27

    申请人： Belgacem Haba ,  Para Segaram ,  Joseph C. Fjelstad

    发明人： Belgacem Haba ,  Para Segaram ,  Joseph C. Fjelstad

    IPC分类号： H01R24/00

    CPC分类号： H01R12/88 ,  H01R12/79 ,  H01R13/2407

    摘要： A connector is described which uses a coupling structure integrally formed from a plurality of discrete elements that are aligned to receive an insertion force. In response to the insertion force affecting some or all of the elements, the affected elements move from an original state into a deflected state. In the deflected state, the overall thickness of the coupling structure is reduced. The relationship between the coupling structure and a dimension of a cavity that is to be occupied by the coupling structure is such that when the thickness of the coupling structure is reduced, the dimension of the cavity is increased.

    摘要翻译： 描述了一种连接器，其使用由对准以接收插入力的多个分立元件整体形成的联接结构。 响应于影响部分或全部元件的插入力，受影响的元件从原始状态移动到偏转状态。 在偏转状态下，耦合结构的总体厚度减小。 耦合结构与要由耦合结构占据的空腔的尺寸之间的关系使得当耦合结构的厚度减小时，空腔的尺寸增加。

    Auto tracking notch filter using switched capacitors to measure harmonic distortion and noise contained in a signal source
    10.
    发明授权
    Auto tracking notch filter using switched capacitors to measure harmonic distortion and noise contained in a signal source 失效
    自动跟踪陷波滤波器，使用开关电容来测量信号源中包含的谐波失真和噪声

    公开(公告)号：US4954785A

    公开(公告)日：1990-09-04

    申请号：US337082

    申请日：1989-04-12

    申请人： Para Segaram

    发明人： Para Segaram

    IPC分类号： H03H19/00 ,  H03J7/02

    CPC分类号： H03J7/02 ,  H03H19/004

    摘要： A tunable filter (66) having a filter characteristic tracking an input signal in accordance with the invention includes a signal source (18) providing a variable frequency signal to be tracked by the filter characteristic; a frequency detector (62) coupled to the signal source for producing a detector output signal which is a function of the frequency of the variable frequency signal; a switching signal generator (64), responsive to the frequency detector output signal, for generating at least one switching signal having a variable frequency proportional to the detector output signal; a first capacitor (112, 126, 150, 152, 156 and 158) having a first terminal coupled to a reference potential and a second terminal; and a first switching circuit (114, 128, 154 and 160) having an input coupled to the variable frequency signal, responsive to the at least one switching signal, and in response to changes in level of the at least one switching signal alternately connecting the input of the first switching circuit to the second terminal of the first capacitor and the second terminal of the first capacitor to the output of the first switching circuit coupled to an output of the filter.

    摘要翻译： 根据本发明的具有跟踪输入信号的滤波器特性的可调滤波器（66）包括提供由滤波器特性跟踪的可变频率信号的信号源（18）; 耦合到所述信号源的频率检测器（62），用于产生作为所述可变频率信号的频率的函数的检测器输出信号; 响应于所述频率检测器输出信号的开关信号发生器（64），用于产生具有与所述检测器输出信号成比例的可变频率的至少一个开关信号; 具有耦合到参考电位的第一端子和第二端子的第一电容器（112,126,150,152,156和158）; 以及第一开关电路（114,128,154和160），其具有耦合到所述可变频率信号的输入，响应于所述至少一个开关信号，以及响应于所述至少一个开关信号的电平的变化， 将第一开关电路的输入端与第一电容器的第二端子和第一电容器的第二端子输入到耦合到滤波器的输出端的第一开关电路的输出端。