公开(公告)号：US11824761B1

公开(公告)日：2023-11-21

申请号：US16199744

申请日：2018-11-26

Applicant: Xilinx, Inc.

Inventor： Ben J. Jones

IPC: H04L45/24 ,  H04L25/14 ,  H04L1/00

CPC classification number: H04L45/24 ,  H04L1/0045 ,  H04L25/14

Abstract: Methods and apparatus for detecting alignment markers in received data streams received via a plurality of data lanes are disclosed. Corresponding data streams may be received via respective data lanes in the plurality of data lanes, where each data stream includes alignment markers delineating data frames, and each alignment marker has a predefined bit pattern. For each respective data lane, a determination is made whether a specified portion of the received data stream has at least a threshold degree of similarity with a portion of the predefined bit pattern. In response to determining, for one of the plurality of data lanes, that the specified portion has at least the threshold degree of similarity, a frame boundary may be determined based on the specified portion, and a verification may be performed, that the specified portion of the received data stream corresponds to an alignment marker.

公开(公告)号：US20230336266A1

公开(公告)日：2023-10-19

申请号：US18337934

申请日：2023-06-20

Applicant: Kandou Labs, S.A.

Inventor： Amin Shokrollahi ,  Ali Hormati ,  Roger Ulrich

IPC: H04J13/00 ,  H04L25/03 ,  H04L25/02 ,  H04L25/14 ,  H04L25/49

CPC classification number: H04J13/004 ,  H04L25/03343 ,  H04L25/0272 ,  H04L25/0276 ,  H04L25/14 ,  H04L25/4919

Abstract: An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herein called the “ISI Ratio” are described which permit higher communications speed, lower system power consumption, and reduced implementation complexity.

公开(公告)号：US20230231647A1

公开(公告)日：2023-07-20

申请号：US18124127

申请日：2023-03-21

Applicant: Entropic Communications, LLC

Inventor： David Barr ,  Michail Tsatsanis ,  Arndt Mueller ,  Na Chen

IPC: H04L1/00 ,  H04L12/28 ,  H04L25/14 ,  H04L47/70 ,  H04L1/02 ,  H04L5/00 ,  H03M13/11 ,  H03M13/00

CPC classification number: H04L1/0009 ,  H04L12/2801 ,  H04L12/2865 ,  H04L25/14 ,  H04L47/828 ,  H04L1/0042 ,  H04L1/02 ,  H04L5/0091 ,  H03M13/1102 ,  H03M13/618 ,  H04L1/0041 ,  H04L27/2602

Abstract: A particular overall architecture for transmission over a bonded channel system consisting of two interconnected MoCA (Multimedia over Coax Alliance) 2.0 SoCs (Systems on a Chip) and a method and apparatus for the case of a “bonded” channel network. With a bonded channel network, the data is divided into two segments, the first of which is transported over a primary channel and the second of which is transported over a secondary channel.

公开(公告)号：US20190243410A1

公开(公告)日：2019-08-08

申请号：US16389340

申请日：2019-04-19

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Toshitada SAITO ,  Akihisa FUJIMOTO

IPC: G06F1/06 ,  H03L7/099 ,  H03L7/08 ,  H03L7/07 ,  H03L7/091 ,  H04L7/033 ,  H04L7/00 ,  G06F13/42

CPC classification number: G06F1/06 ,  G06F1/12 ,  G06F13/38 ,  G06F13/4282 ,  H03L7/00 ,  H03L7/07 ,  H03L7/0807 ,  H03L7/091 ,  H03L7/099 ,  H04L7/0004 ,  H04L7/0012 ,  H04L7/033 ,  H04L25/085 ,  H04L25/14

Abstract: According to one embodiment, an interface system includes a receiver, a first clock generator, a second clock generator, and a sampling circuit. The receiver is configured to receive a first clock and serial data from a host. The first clock generator includes a first voltage controlled oscillator (VCO) and is configured to generate a second clock on the basis of the first clock. The second clock generator includes a second voltage controlled oscillator (VCO) and is configured to generate a third clock on the basis of the serial data. The sampling circuit is configured to sample reception data on the basis of the third clock and the serial data.

公开(公告)号：US20180212803A1

公开(公告)日：2018-07-26

申请号：US15744062

申请日：2015-12-23

Applicant: Watchy Technology Private Limited

Inventor： Sriramkumar HARIHARAN Vanamurthy ,  Vinoth Kumar VIVEKANANDA

IPC: H04L25/14 ,  H04L12/709 ,  H04W76/15 ,  H04W28/20 ,  H04W28/02

CPC classification number: H04L25/14 ,  H04L45/24 ,  H04L45/245 ,  H04L67/28 ,  H04L69/14 ,  H04L69/24 ,  H04W28/0221 ,  H04W28/20 ,  H04W76/15

Abstract: System for increasing bandwidth available for data communication is provided. The system (100) includes user equipment (102) and an intermediate server (104). The user equipment (102) is configured to allocate data to a plurality of data channels (106) for transmission to the intermediate server (104), wherein each of the data channels (106) is associated with a radio access technology (108). The user equipment (102) sends the allocated data via the plurality of data channels (106) simultaneously to a destination server via the intermediate server (104). The user equipment (102) is also configured to receive data from the destination server via the intermediate server (104) via the plurality of data channels (106) simultaneously, and assemble data received from the intermediate server (104) via the plurality of data channels (106).

公开(公告)号：US10009200B2

公开(公告)日：2018-06-26

申请号：US15405020

申请日：2017-01-12

Applicant: INPHI CORPORATION

Inventor： Arun Tiruvur ,  Jamal Riani ,  Sudeep Bhoja

IPC: H04L27/04 ,  H04L1/00

CPC classification number: H04L27/04 ,  H04L1/0041 ,  H04L1/0042 ,  H04L1/0045 ,  H04L25/14

Abstract: Embodiments of the present invention include an apparatus that receives date from multiple lanes, which are then aligned and synchronized for transcoding and encoding.

公开(公告)号：US09963965B2

公开(公告)日：2018-05-08

申请号：US15331426

申请日：2016-10-21

Applicant: COLD BORE TECHNOLOGY INC.

Inventor： Aryan Saed

IPC: E21B47/16

CPC classification number: E21B47/16 ,  H04B1/005 ,  H04J11/00 ,  H04L1/00 ,  H04L25/14 ,  H04L27/26 ,  H04L27/2626

Abstract: A method for transmitting data in a frequency selective communication channel in provided. The method comprises: parsing data to be transmitted into a plurality of data fields; assigning the data from each data field into a corresponding one of a plurality of sub-channels; modulating the data from each of the plurality of sub-channels into a corresponding one of a plurality of sub-bands, the plurality of sub-bands having spaced apart center frequencies; and concurrently transmitting the data from the plurality of sub-bands onto the channel.

公开(公告)号：US09954635B2

公开(公告)日：2018-04-24

申请号：US15054045

申请日：2016-02-25

Applicant: Intel Corporation

Inventor： Dennis D. Ferguson ,  James A. Proctor, Jr.

IPC: H04B7/216 ,  H04J13/16 ,  G11B20/18 ,  H03M13/35 ,  H04L1/00 ,  H04L1/18 ,  H04L25/14 ,  H04B7/26 ,  H04L1/16

CPC classification number: H04J13/16 ,  G11B20/1833 ,  H03M13/35 ,  H04B7/2631 ,  H04B2201/709709 ,  H04L1/0007 ,  H04L1/0025 ,  H04L1/0041 ,  H04L1/0042 ,  H04L1/0057 ,  H04L1/1607 ,  H04L1/1809 ,  H04L1/1816 ,  H04L1/1835 ,  H04L25/14

Abstract: A protocol for optimizing the use of coded transmissions such as over wireless links. In this technique, interframes are split into segments selected to be an optimum size according to transmission characteristics of the radio channel. The inverse process is applied at the receiver. Using this scheme, segments containing erroneous data may be resent.

公开(公告)号：US20180083638A1

公开(公告)日：2018-03-22

申请号：US15603404

申请日：2017-05-23

Applicant: Kandou Labs, S.A.

Inventor： Armin Tajalli

IPC: H03L7/08 ,  H03L7/089 ,  H03L7/099 ,  H03K19/21

CPC classification number: H04L25/40 ,  H03K19/21 ,  H03L7/0807 ,  H03L7/087 ,  H03L7/0891 ,  H03L7/0995 ,  H03L7/0998 ,  H03L2207/06 ,  H04L7/0025 ,  H04L7/0337 ,  H04L25/0272 ,  H04L25/14 ,  H04L2203/02

Abstract: Methods and systems are described for generating, with a local oscillator and an adjustable phase interpolator, a data-sampling clock and a variable-phase-offset eye-measurement clock, forming a received data signal using a multi-input comparator, generating, using a data slicer and the data sampling clock, a receive sample of the received data signal, and generating, using at least one eye slicer and the variable-phase-offset eye-measurement clock, a plurality of eye characteristic measurements by adjusting a sampling threshold of the at least one eye slicer and a phase offset of the variable-phase-offset eye-measurement clock.

公开(公告)号：US20180041330A1

公开(公告)日：2018-02-08

申请号：US15554867

申请日：2016-04-05

Applicant: ISMEDIA CO., LTD.

Inventor： Sung-Oh YIM

IPC: H04L7/00

CPC classification number: H04L7/0041 ,  G06F13/4072 ,  H04L7/04 ,  H04L25/14

Abstract: The present invention relates to a method and an apparatus for automatic skew compensation. The apparatus according to the present invention comprises: a skew compensating part configured to receive a high speed data signal and output a plurality of delay data signals having different delay times; a start code detecting part configured to detect a start code from the plurality of delay data signals; and a control part configured to determine a skew delay time depending on signal reception quality which is determined on the basis of the number of start codes normally detected for each different delay time. The apparatus may further comprise a packet start detecting part configured to receive an LP signal separated from an MIPI D-PHY and count the number of received packets. The packet start detecting part receives the LP signal separated from the MIPI D-PHY, and counts the number of packets received at every preset quality evaluation time by detecting the start location of a packet according to the state of the LP signal. The signal reception quality is obtained using the number of normally detected start codes and the number of received packets received and counted at every quality evaluation time. The present invention can automatically compensate the skew between a data signal and a clock signal in an MIPI D-PHY reception system.