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    SYNCHRONOUSLY-SWITCHED MULTI-INPUT DEMODULATING COMPARATOR
    1.
    发明申请
    SYNCHRONOUSLY-SWITCHED MULTI-INPUT DEMODULATING COMPARATOR 审中-公开

    公开(公告)号：US20190207793A1

    公开(公告)日：2019-07-04

    申请号：US16236012

    申请日：2018-12-28

    申请人： Kandou Labs, S.A.

    发明人： Armin Tajalli

    IPC分类号： H04L27/20 ,  H04L27/148 ,  H04L27/26

    CPC分类号： H04L27/2071 ,  H04L25/0274 ,  H04L25/0292 ,  H04L25/4919 ,  H04L27/148 ,  H04L27/2605 ,  H04L2027/0036 ,  H04L2201/04

    摘要： Methods and systems are described for obtaining a set of carrier-modulated symbols of a carrier-modulated codeword, each carrier-modulated symbol received via a respective wire of a plurality of wires of a multi-wire bus, applying each carrier-modulated symbol of the set of carrier-modulated symbols to a corresponding transistor of a set of transistors, the set of transistors further connected to a pair of output nodes according to a sub-channel vector of a plurality of mutually orthogonal sub-channel vectors, recovering a demodulation signal from the carrier-modulated symbols, and generating a demodulated sub-channel data output as a differential voltage on the pair of output nodes based on a linear combination of the set of carrier-modulated symbols by controlling conductivity of the set of transistors according to the demodulation signal.

    Method and circuit for establishing network connection
    3.
    发明授权
    Method and circuit for establishing network connection 有权

    公开(公告)号：US09438453B2

    公开(公告)日：2016-09-06

    申请号：US14812233

    申请日：2015-07-29

    申请人： REALTEK SEMICONDUCTOR CORPORATION

    发明人： Sheng-Fu Chuang ,  Liang-Wei Huang ,  Ching-Yao Su ,  Hsuan-Ting Ho

    IPC分类号： H04L25/49 ,  H04L29/08

    CPC分类号： H04L25/4919 ,  H04L67/12

    摘要： The present invention discloses a network connection establishing method capable of preventing a link procedure from being strangled in a training state. An embodiment of the method comprises: a preceding step; a training step; and a following step. Said training step includes at least one of the following: counting a number, and returning to the preceding step if a local receiver is not yet ready after finishing counting the number; detecting a reception signal according to a signal detection level, and returning to the preceding step when none of the reception signal is detected; determining a number of level(s) of the reception signal, and returning to the preceding step if the number of level(s) is less than an expected level number; and comparing a signal-to-noise ratio of the reception signal with a signal-to-noise threshold, and returning to the preceding step when the signal-to-noise ratio fails to satisfy the signal-to-noise threshold.

    Method for Code Evaluation Using ISI Ratio
    4.
    发明申请
    Method for Code Evaluation Using ISI Ratio 有权
    使用ISI比率的代码评估方法

    公开(公告)号：US20150222458A1

    公开(公告)日：2015-08-06

    申请号：US14612241

    申请日：2015-02-02

    申请人： Kandou Labs SA

    发明人： Ali Hormati ,  Amin Shokrollahi ,  Roger Ulrich

    IPC分类号： H04L25/03 ,  H04L25/02

    CPC分类号： H04J13/004 ,  H04L25/0272 ,  H04L25/0276 ,  H04L25/03343 ,  H04L25/14 ,  H04L25/4919

    摘要： An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herein called the “ISI Ratio” are described which permit higher communications speed, lower system power consumption, and reduced implementation complexity.

    摘要翻译： 描述了一种有效的通信装置，用于向量信令码，以在集成电路装置之间传输数据和可选的时钟信号。 描述了基于这种称为“ISI比率”的新度量来设计这种装置及其相关代码的方法，其允许更高的通信速度，更低的系统功耗和降低的实现复杂度。

    Multilevel amplitude modulation device, multilevel amplitude demodulation device, transmission system including these, multilevel amplitude modulation method, and multilevel amplitude demodulation method
    5.
    发明授权
    Multilevel amplitude modulation device, multilevel amplitude demodulation device, transmission system including these, multilevel amplitude modulation method, and multilevel amplitude demodulation method 有权
    多电平幅度调制装置，多电平幅度解调装置，包括这些传输系统，多电平幅度调制方法和多电平幅度解调方法

    公开(公告)号：US08976890B2

    公开(公告)日：2015-03-10

    申请号：US13892464

    申请日：2013-05-13

    申请人： Panasonic Corporation

    发明人： Tsuyoshi Ikushima ,  Osamu Shibata

    IPC分类号： H04L25/34 ,  H04L25/49 ,  H04L25/06

    CPC分类号： H04L25/4917 ,  H04L25/061 ,  H04L25/4919

    摘要： A multilevel amplitude modulation device for generating, from digital data, a multilevel amplitude modulation signal having four or more signal levels and outputting the generated signal, including: an average level calculator that selects one of a plurality of preliminarily prepared different candidates for a code word building method such that average level of a symbol array, obtained by adding a symbol for a code word of digital data to be transmitted to one or more already outputted symbols included in a multilevel amplitude modulation signal already outputted, is most approximate to voltage center of the four or more signal levels, and outputs a selection signal indicating the selected method; a signal converter that forms a codeword of the digital data in accordance with the method indicated by the selection signal; and a multilevel modulator that generates a multilevel amplitude modulation signal using the codeword and outputs the generated signal.

    摘要翻译： 一种多电平幅度调制装置，用于从数字数据生成具有四个或更多个信号电平的多电平幅度调制信号，并输出所产生的信号，包括：平均电平计算器，其选择多个预先准备的用于码字的不同候选项之一 使得通过将要发送的数字数据的码字的符号添加到已经输出的多电平幅度调制信号中的一个或多个已经输出的符号获得的符号阵列的平均电平最接近于 四个或更多个信号电平，并输出指示所选方法的选择信号; 信号转换器，其根据由选择信号指示的方法形成数字数据的码字; 以及多电平调制器，其使用码字产生多电平幅度调制信号并输出​​所生成的信号。

    Error detection and offset cancellation during multi-wire communication
    7.
    发明授权
    Error detection and offset cancellation during multi-wire communication 有权
    多线通讯期间的错误检测和偏移消除

    公开(公告)号：US08462891B2

    公开(公告)日：2013-06-11

    申请号：US12920806

    申请日：2009-02-19

    申请人： Jade M. Kizer ,  John Wilson ,  Lei Luo ,  Frederick Ware ,  Jared L. Zerbe

    发明人： Jade M. Kizer ,  John Wilson ,  Lei Luo ,  Frederick Ware ,  Jared L. Zerbe

    IPC分类号： H04L27/06

    CPC分类号： H03M13/47 ,  H04L25/4919

    摘要： Embodiments of a circuit are described. In this circuit, a receive circuit includes M input nodes that receive a set of M symbols on M links during a time interval, where the set of M symbols are associated with a codeword. Moreover, the receive circuit includes a decoder, coupled to the M input nodes, that determines the codeword in a code space based on the set of M symbols and that decodes the codeword to a corresponding set of N decoded symbols. Additionally, the receive circuit may include a detector that detects an imbalance in a number of instances of a first value in the set of M symbols and a number of instances of a second value in the set of M symbols, and, if an imbalance is detected, that asserts an error condition.

    摘要翻译： 描述电路的实施例。 在该电路中，接收电路包括M个输入节点，该输入节点在时间间隔期间在M个链路上接收一组M个符号，其中该M个符号集合与码字相关联。 此外，接收电路包括耦合到M个输入节点的解码器，其基于该M个符号集来确定码空间中的码字，并且将码字解码为相应的一组N个解码符号。 此外，接收电路可以包括检测器，其检测M个符号集合中的第一值的多个实例中的不平衡以及M个符号集合中的第二值的实例的数量，并且如果不平衡是 检测到，这会导致错误条件。

    Class A-B line driver for gigabit Ethernet
    8.
    发明授权
    Class A-B line driver for gigabit Ethernet 有权
    用于千兆以太网的A-B线驱动器

    公开(公告)号：US08452001B1

    公开(公告)日：2013-05-28

    申请号：US12950722

    申请日：2010-11-19

    申请人： Pierte Roo

    发明人： Pierte Roo

    IPC分类号： H04M1/00 ,  H04M9/00

    CPC分类号： H04L25/0272 ,  H04L25/4919

    摘要： A line driver including a first driver circuit, a second driver circuit, and a first summing circuit. The first driver circuit generates a first component signal having a first polarity based on a first transmit signal, the bias signal, and the offset signal. The second driver circuit generates a second component signal having a second polarity based on a second transmit signal, the bias signal, and the offset signal. The first summing circuit sums the first and second component signals to generate a first differential signal. A first average current of the first differential signal for multiple symbols is greater than a second average current of a second differential signal for the symbols. The second differential signal is generated by summing a first biased signal and a second biased signal.

    摘要翻译： 一种线驱动器，包括第一驱动电路，第二驱动电路和第一求和电路。 第一驱动器电路基于第一发送信号，偏置信号和偏移信号产生具有第一极性的第一分量信号。 第二驱动器电路基于第二发送信号，偏置信号和偏移信号产生具有第二极性的第二分量信号。 第一求和电路对第一和第二分量信号进行求和以产生第一差分信号。 用于多个符号的第一差分信号的第一平均电流大于用于符号的第二差分信号的第二平均电流。 通过对第一偏置信号和第二偏置信号求和来产生第二差分信号。

    Encoding apparatus, encoding method, and program
    9.
    发明授权
    Encoding apparatus, encoding method, and program 失效
    编码装置，编码方法和程序

    公开(公告)号：US08258988B2

    公开(公告)日：2012-09-04

    申请号：US12909604

    申请日：2010-10-21

    申请人： Toru Terashima

    发明人： Toru Terashima

    IPC分类号： H03M5/02

    CPC分类号： H03M5/20 ,  H04L25/4919

    摘要： Provided is an encoding apparatus including an encoding unit that converts, based on a first conversion rule group according to which a total value for a base-K symbol sequence is X and a second conversion rule group according to which the total value for the base-K symbol sequence is −X among conversion rule groups for converting an L-bit bit sequence into the base-K symbol sequence (K>2) of N/2 symbol, an M-bit (M≧2*L) bit sequence into the base-K symbol sequence of N symbols. When converting the M-bit bit sequence into the base-K symbol sequence of N symbols, the encoding unit converts a first-half N/2 symbol based on the first conversion rule group and converts a second-half N/2 symbol based on the second conversion rule group.

    摘要翻译： 提供了一种编码装置，其包括：编码单元，其基于基本K符号序列的总值为X的第一转换规则组和基准K符号序列的总值为第二转换规则组， K符号序列是用于将L位比特序列转换成N / 2符号的基本K符号序列（K> 2）的转换规则组中的-X，将M比特（M≥2* L）比特序列转换成 N个符号的基本K符号序列。 当将M位比特序列转换为N个符号的基本K符号序列时，编码单元基于第一转换规则组转换前半个N / 2符号，并且基于 第二个转换规则组。