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公开(公告)号：US10078944B1
公开(公告)日：2018-09-18
申请号：US15610364
申请日：2017-05-31
Applicant: Pablo Oscar Olivera Brizzio
Inventor： Pablo Oscar Olivera Brizzio
CPC classification number: G01R31/2812 , G01R31/025 , G01R31/2829 , H01H9/0066 , H01R9/28 , H05K1/0289 , H05K3/222 , H05K2201/09063 , H05K2201/10363 , H05K2201/10409 , Y02B20/343
Abstract: Disclosed is an apparatus for optimally facilitating interconnections between electrical endpoints. The apparatus comprises a number of terminals equal to a number of combinations of the plurality of endpoints. For example, to enable combinations of two endpoints to be made between N endpoints, the apparatus comprises N(N−1)/2 terminals. Each terminal at least comprises a first contact coupled to a first endpoint and a second contact coupled to a second endpoint. The first contact and second contact of any terminal can be shorted to connect their corresponding endpoints. The apparatus may further comprise a circuit identification process executed by a microcontroller. In this case, each terminal additionally comprises a first circuit identification contact and a second circuit identification contact. The process involves outputting a voltage to the first circuit identification contact and detecting the voltage of the second circuit identification contact to determine whether the corresponding terminal is activated.
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2.发明申请
公开(公告)号：US20180076550A1
公开(公告)日：2018-03-15
申请号：US15697429
申请日：2017-09-06
Applicant: KAO-KUNG CHIU , SHIN-NUNG CHENG
Inventor： KAO-KUNG CHIU , SHIN-NUNG CHENG
CPC classification number: H01R12/728 , H01R12/75 , H05K1/117 , H05K1/181 , H05K3/222 , H05K3/32 , H05K3/3405 , H05K7/06 , H05K2201/10287 , H05K2201/1031 , H05K2201/1034 , H05K2201/10356 , H05K2201/10446 , H05K2201/10962 , Y02P70/611
Abstract: A circuit board with wire conductive pads is provided for insertion of wires, and includes: a circuit board and a wire conductive pad. The wire conductive pad includes a main body in the form of a hollow column and an elastic locking piece extending from the main body. The main body includes a peripheral wall defining an insertion space. The elastic locking piece is inserted from the peripheral wall into the insertion space in an inclined manner to press towards the peripheral wall. Wires are inserted into the insertion space and clamped against the peripheral wall by the elastic piece, so that the wires can be prevented from falling off in a reverse direction, and thus can be connected to the circuit board in a more quick and stable manner.
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公开(公告)号：US20170125950A1
公开(公告)日：2017-05-04
申请号：US15404942
申请日：2017-01-12
Applicant: Molex, LLC
Inventor： Brian Keith Lloyd , Christopher David HIRSCHY , Munawar AHMAD , Eran J. JONES , Stephen W. HAMBLIN , Darian Ross SCHULZ , Todd David WARD , Gregory B. WALZ , Ebrahim ABUNASRAH , Rehan KHAN
IPC: H01R13/6461 , H01R13/6592
CPC classification number: H01R13/6461 , H01B11/00 , H01R13/6471 , H01R13/6592 , H01R13/6593 , H05K1/0243 , H05K3/222 , H05K2201/10189 , H05K2201/10356 , H05K2201/10446 , H05K2201/10674
Abstract: A cable bypass assembly is disclosed for use in providing a high speed transmission line for connecting a board mounted connector of an electronic device to a chip on the device board. The bypass cable assembly has a structure that permits it, where it is terminated to the board mounted connector and the chip member, or closely proximate thereto, to allow signals to be transmitted at greater than 10 GHz with substantially lower loss than a traditional FR4 circuit board.
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公开(公告)号：US09639214B2
公开(公告)日：2017-05-02
申请号：US13947617
申请日：2013-07-22
Applicant: Synaptics Incorporated
Inventor： Jim Dunphy , Joseph Kurth Reynolds
CPC classification number: G06F3/044 , G06F2203/04112 , H05K1/0306 , H05K1/111 , H05K3/222 , Y02P70/611
Abstract: A chip-on-glass device comprises a chip-on-glass substrate, a metal layer, and a plurality of chip-on-glass connection bumps. The metal layer comprises a plurality of passive jumper routing traces. The plurality of chip-on-glass connection humps is coupled with passive jumper routing traces of the plurality of passive jumper routing traces.
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公开(公告)号：US09392696B2
公开(公告)日：2016-07-12
申请号：US14824210
申请日：2015-08-12
Applicant: MEDIATEK Inc.
Inventor： Nan-Jang Chen
IPC: H01L23/48 , H01L23/52 , H01L29/40 , H05K1/18 , H01L23/367 , H05K1/11 , H01L23/498 , H05K1/02 , H01L23/31 , H01L23/00
CPC classification number: H05K1/181 , H01L23/3107 , H01L23/3121 , H01L23/3675 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/30 , H01L24/32 , H01L24/33 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253 , H01L2924/12042 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/16152 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H05K1/0203 , H05K1/114 , H05K3/222 , H05K2201/066 , H05K2201/10287 , H05K2201/10977 , H05K2203/049 , H01L2924/00 , H01L2924/014 , H01L2924/00012
Abstract: A semiconductor package includes a substrate, a first conductive layer, a second conductive layer, a first surface mount device, a second surface mount device and a connection element. The first conductive layer is formed on the substrate and has a first pad and a second pad separated from the first pad. The second conductive layer is formed on the substrate and has a third pad and a fourth pad electrically connected with the third pad through the second conductive layer. The first surface mount device is mounted on the first pad and the third pad. The second surface mount device is mounted on the second pad and the fourth pad. The connection element electrically connects the first pad with the second pad.
Abstract translation: 半导体封装包括衬底，第一导电层，第二导电层，第一表面安装器件，第二表面安装器件和连接元件。 第一导电层形成在基板上，并具有与第一焊盘分离的第一焊盘和第二焊盘。 第二导电层形成在基板上，并具有通过第二导电层与第三焊盘电连接的第三焊盘和第四焊盘。 第一表面贴装装置安装在第一垫和第三垫上。 第二表面安装装置安装在第二垫和第四垫上。 连接元件将第一焊盘与第二焊盘电连接。
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公开(公告)号：US09301401B2
公开(公告)日：2016-03-29
申请号：US14819972
申请日：2015-08-06
Applicant: The Boeing Company
Inventor： Keith Daniel Humfeld
IPC: H05K3/22 , H01L23/532
CPC classification number: H05K3/222 , B82Y30/00 , H01L21/76838 , H01L23/53276 , H01L2221/1094 , H01L2924/0002 , H05K2201/026 , H05K2201/0323 , H05K2201/0367 , H05K2201/10363 , H01L2924/00
Abstract: A fabricated substrate has at least one plurality of posts. The plurality is fabricated such that the two posts are located at a predetermined distance from one another. The substrate is exposed to a fluid matrix containing functionalized carbon nanotubes. The functionalized carbon nanotubes preferentially adhere to the plurality of posts rather than the remainder of the substrate. A connection between posts of the at least one plurality of posts is induced by adhering one end of the functionalized nanotube to one post and a second end of the functionalized carbon nanotube to a second post.
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7.发明申请METHOD FOR MANUFACTURING A CIRCUIT BOARD SYSTEM WITH MECHANICAL PROTECTION 审中-公开用于制造具有机械保护的电路板系统的方法
公开(公告)号：US20150250059A1
公开(公告)日：2015-09-03
申请号：US14715627
申请日：2015-05-19
Applicant: TELLABS OY
Inventor： Antti HOLMA , Peter KOKKO
CPC classification number: H05K3/303 , H05K1/02 , H05K3/22 , H05K3/222 , H05K3/30 , H05K3/306 , H05K2201/09972 , H05K2201/10189 , H05K2201/10303 , H05K2201/10363 , H05K2201/1059 , H05K2201/2018 , H05K2203/162 , Y10T29/49004 , Y10T29/4913
Abstract: A method for manufacturing a circuit board system comprising mechanical protection of electrical components is presented. The circuit board system comprises a circuit board (101) furnished with electrical components (103-111) and a protection element (102) attached to areas of the circuit board which are free from the electrical components. The protection element has thickness in the direction perpendicular to the circuit board and it is shaped to leave the electrical components unscreened in the direction perpendicular to the circuit board. Thus, the protection element constitutes barriers protecting the electrical components but still allows the electrical components to be accessed from the direction perpendicular to the circuit board for example in a flying probe testing. Furthermore, the protection element provides electrical connections between functional entities of the circuit board system.
Abstract translation: 提出了一种用于制造包括电气部件的机械保护的电路板系统的方法。 电路板系统包括配备有电气部件（103-111）的电路板（101）和附接到电路板的没有电气部件的区域的保护元件（102）。 保护元件在垂直于电路板的方向上具有厚度，并且其形状使得电子部件在垂直于电路板的方向上未被屏蔽。 因此，保护元件构成保护电气元件的障碍物，但是仍然允许例如在飞行探针测试中从垂直于电路板的方向访问电气部件。 此外，保护元件在电路板系统的功能实体之间提供电连接。
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公开(公告)号：US09055700B2
公开(公告)日：2015-06-09
申请号：US13059602
申请日：2009-08-11
Applicant: Mark Robson Humphries , Frank Ferdinandi , Rodney Edward Smith
Inventor： Mark Robson Humphries , Frank Ferdinandi , Rodney Edward Smith
CPC classification number: H05K3/282 , H01H13/78 , H01H2215/004 , H01H2229/012 , H01L24/45 , H01L24/48 , H01L24/85 , H01L2224/06 , H01L2224/45014 , H01L2224/45015 , H01L2224/45105 , H01L2224/45109 , H01L2224/45111 , H01L2224/45113 , H01L2224/45116 , H01L2224/4512 , H01L2224/45124 , H01L2224/45138 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45149 , H01L2224/45155 , H01L2224/45157 , H01L2224/4516 , H01L2224/45164 , H01L2224/45166 , H01L2224/45169 , H01L2224/4517 , H01L2224/45171 , H01L2224/45173 , H01L2224/45178 , H01L2224/4518 , H01L2224/45184 , H01L2224/45565 , H01L2224/45599 , H01L2224/45644 , H01L2224/4569 , H01L2224/48091 , H01L2224/48455 , H01L2224/48463 , H01L2224/48464 , H01L2224/48599 , H01L2224/48699 , H01L2224/8502 , H01L2224/85201 , H01L2224/85205 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85484 , H01L2224/85611 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01016 , H01L2924/01018 , H01L2924/01019 , H01L2924/01021 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/0104 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01072 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/01087 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/19042 , H01L2924/19043 , H01L2924/19107 , H01L2924/2075 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/3011 , H05K3/222 , H05K3/284 , H05K3/328 , H05K2201/015 , H05K2201/0179 , H05K2201/0195 , H05K2203/049 , Y10T29/49155 , H01L2924/00014 , H01L2924/00 , H01L2924/20759 , H01L2924/2076 , H01L2924/20758
Abstract: In some embodiments, a printed circuit board (PCB) comprises a substrate comprising an insulating material. The PCB further comprises a plurality of conductive tracks attached to at least one surface of the substrate. The PCB further comprises a multi-layer coating deposited on the at least one surface of the substrate. The multi-layer coating (i) covers at least a portion of the plurality of conductive tracks and (ii) comprises at least one layer formed of a halo-hydrocarbon polymer. The PCB further comprises at least one electrical component connected by a solder joint to at least one conductive track, wherein the solder joint is soldered through the multi-layer coating such that the solder joint abuts the multi-layer coating.
Abstract translation: 在一些实施例中，印刷电路板（PCB）包括包含绝缘材料的基板。 PCB还包括附接到基板的至少一个表面的多个导电轨迹。 PCB还包括沉积在衬底的至少一个表面上的多层涂层。 多层涂层（i）覆盖多个导电轨道的至少一部分，（ii）包括由卤代烃聚合物形成的至少一层。 PCB还包括至少一个通过焊接接头连接到至少一个导电轨道的电气部件，其中焊接接头通过多层涂层焊接，使得焊接接头邻接多层涂层。
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公开(公告)号：US09053402B2
公开(公告)日：2015-06-09
申请号：US12525042
申请日：2008-05-12
Applicant: Kenichi Honda
Inventor： Kenichi Honda
CPC classification number: G06K19/07749 , G06K19/0775 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/83192 , H01Q1/2225 , H01Q7/00 , H05K1/165 , H05K3/222 , H05K3/3421 , H05K3/3484 , H05K2201/10287 , H05K2201/10674 , Y10T29/49018 , H01L2924/00
Abstract: A wireless IC tag which has an electrically insulative substrate, an antenna circuit provided on the surface of the substrate and an IC chip connected to the antenna circuit, wherein the antenna circuit is formed of solder and the IC chip is connected to the antenna circuit via the solder, andA wireless IC tag comprising an electrically insulative substrate, an antenna circuit provided on the surface of the substrate, an IC chip connected to the antenna circuit, and a jumper wire connected to the antenna circuit, wherein the antenna circuit is formed of a solder, the jumper wire is insulatively coated with a resin composition that evaporates, decomposes, or melts at a temperature not higher than a soldering temperature, and the jumper wire is located on the same side of the substrate where the antenna circuit is provided.
Abstract translation: 具有电绝缘性基板的无线IC标签，设置在基板表面的天线电路和与天线电路连接的IC芯片，其中天线电路由焊料形成，IC芯片经天线电路连接到天线电路 焊料和A无线IC标签，其包括电绝缘基板，设置在基板表面上的天线电路，连接到天线电路的IC芯片和连接到天线电路的跳线，其中形成天线电路 的焊料，在不高于焊接温度的温度下蒸镀，分解或熔化的树脂组合物绝缘地涂覆跳线，并且跨接线位于设置有天线电路的基板的同一侧 。
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10.发明授权
公开(公告)号：US09041052B2
公开(公告)日：2015-05-26
申请号：US13052025
申请日：2011-03-18
Applicant: Satoshi Teramae
Inventor： Satoshi Teramae
IPC: H01L27/12 , H01L25/07 , H01L23/373 , H01L23/498 , H01L23/00 , H05K1/02 , H01L23/04 , H01L23/049 , H01L23/24 , H05K3/00 , H05K3/22
CPC classification number: H01L25/072 , H01L23/04 , H01L23/049 , H01L23/24 , H01L23/3735 , H01L23/49838 , H01L24/29 , H01L24/32 , H01L24/45 , H01L2224/29101 , H01L2224/32013 , H01L2224/32238 , H01L2224/45124 , H01L2224/83447 , H01L2224/83801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01322 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/15787 , H01L2924/19107 , H01L2924/351 , H05K1/0209 , H05K3/0061 , H05K3/222 , H05K2201/09663 , H05K2201/0969 , H05K2201/1028 , H05K2201/10287 , H01L2924/00 , H01L2924/00014
Abstract: A semiconductor device includes: an insulating substrate; a first electrode pattern and a second electrode pattern provided apart from each other on a major surface of the insulating substrate; a semiconductor element connected to the first electrode pattern; an electrode terminal connected to the second electrode pattern; and a connection wiring. The connection wiring electrically connects the first electrode pattern and the second electrode pattern with each other and has a thermal resistance larger than that of the first electrode pattern.
Abstract translation: 半导体器件包括：绝缘基板; 在所述绝缘基板的主表面上彼此分开设置的第一电极图案和第二电极图案; 连接到第一电极图案的半导体元件; 连接到第二电极图案的电极端子; 和连接线。 连接布线将第一电极图案和第二电极图案彼此电连接并且具有比第一电极图案的热阻大的热阻。
