Quartz glass crucible
    2.
    发明授权

    公开(公告)号:US12116692B2

    公开(公告)日:2024-10-15

    申请号:US17413925

    申请日:2019-12-16

    申请人: SUMCO CORPORATION

    摘要: A quartz glass crucible 1 having a cylindrical side wall portion 10a, a bottom portion 10b, and a corner portion 10c connecting the side wall portion 10a and the bottom portion 10b to each other includes a transparent layer 11 made of quartz glass, and a bubble layer 12 made of quartz glass and formed outside the transparent layer 11. A ratio of an infrared transmittance of the corner portion 10c at a maximum thickness position of the corner portion 10c to an infrared transmittance of the side wall portion 10a is 0.3 or more and 0.99 or less, and an absolute value of a rate of change in infrared transmittance in a height direction along a wall surface of the crucible from a center of the bottom portion 10b toward an upper end of the side wall portion 10a is 3%/cm or less.

    METHOD OF CREATING CORRELATION RELATIONAL FORMULA FOR DETERMINING POLISHING CONDITION, METHOD OF DETERMINING POLISHING CONDITION, AND SEMICONDUCTOR WAFER MANUFACTURING METHOD

    公开(公告)号:US20240246191A1

    公开(公告)日:2024-07-25

    申请号:US18289924

    申请日:2022-02-28

    申请人: SUMCO CORPORATION

    发明人: Yuki NAKANO

    摘要: A method of creating a correlation relational formula for determining a polishing condition, the method including polishing semiconductor wafers under a plurality of polishing conditions including a plurality of polishing parameters, and acquiring, by actual measurement, in-plane polishing amount distribution information on the semiconductor wafers in polishing under the plurality of polishing conditions; polishing semiconductor wafers under a plurality of polishing conditions including a plurality of polishing parameters, and acquiring, by actual measurement, in-plane temperature distribution information during semiconductor wafer polishing in polishing under the plurality of polishing conditions, or creating in-plane temperature distribution information during semiconductor wafer polishing under polishing conditions including a plurality of polishing parameters by heat transfer analysis, and correlating relational formulas between a semiconductor wafer in-plane temperature distribution parameter and a plurality of polishing parameters.

    Method of polishing silicon wafer

    公开(公告)号:US11890719B2

    公开(公告)日:2024-02-06

    申请号:US16607941

    申请日:2017-10-17

    申请人: SUMCO CORPORATION

    发明人: Shuhei Matsuda

    摘要: In a method of polishing a silicon wafer, a final polishing step includes an upstream polishing step and a subsequent finish polishing step. In the upstream polishing step, as a polishing agent, a first alkaline aqueous solution containing abrasive grains with a density of 1×1014/cm3 or more is first supplied, and the supply is then switched to a supply of a second alkaline aqueous solution containing a water-soluble polymer and abrasive grains with a density of 5×1013/cm3 or less. In the finish polishing step, as a polishing agent, a third alkaline aqueous solution containing a water-soluble polymer and abrasive grains with a density of 5×10′13/cm3 or less is supplied. Thus, the formation of not only PIDs but also scratches with small depth can be suppressed.